blob: eb75af0b6df303f13f0220c13bf28a7cb913da62 [file] [log] [blame]
{
"description": "2-input OR into first two inputs of 3-input AND.",
"equation": "X = ((A1 | A2) & (B1 | B2) & C1)",
"file_prefix": "sky130_fd_sc_hdll__o221a",
"library": "sky130_fd_sc_hdll",
"name": "o221a",
"parameters": [],
"ports": [
[
"signal",
"X",
"output",
""
],
[
"signal",
"A1",
"input",
""
],
[
"signal",
"A2",
"input",
""
],
[
"signal",
"B1",
"input",
""
],
[
"signal",
"B2",
"input",
""
],
[
"signal",
"C1",
"input",
""
],
[
"power",
"VPWR",
"input",
"supply1"
],
[
"power",
"VGND",
"input",
"supply0"
],
[
"power",
"VPB",
"input",
"supply1"
],
[
"power",
"VNB",
"input",
"supply0"
]
],
"type": "cell",
"verilog_name": "sky130_fd_sc_hdll__o221a"
}