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    "voltage_name": "VGND"
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  "pg_pin VNB": {
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    "pg_type": "primary_power",
    "related_bias_pin": "VPB",
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    "max_transition": 5.0,
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  "pin D_N": {
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    "clock": "false",
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    "internal_power": {
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      "rise_power power_inputs_1": {
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    "max_transition": 5.0,
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}