| { |
| "area": 21.2704, |
| "cell_footprint": "dlrtn", |
| "cell_leakage_power": 0.001396653, |
| "latch IQ,IQ_N": { |
| "clear": "!RESET_B", |
| "data_in": "D", |
| "enable": "!GATE_N" |
| }, |
| "leakage_power": [ |
| { |
| "value": 0.0013953, |
| "when": "RESET_B&D&!GATE_N&Q" |
| }, |
| { |
| "value": 0.0012173, |
| "when": "RESET_B&!D&GATE_N&!Q" |
| }, |
| { |
| "value": 0.0012289, |
| "when": "!RESET_B&!D&!GATE_N&!Q" |
| }, |
| { |
| "value": 0.0012367, |
| "when": "RESET_B&!D&!GATE_N&!Q" |
| }, |
| { |
| "value": 0.0013778, |
| "when": "RESET_B&D&GATE_N&Q" |
| }, |
| { |
| "value": 0.0017326, |
| "when": "!RESET_B&D&!GATE_N&!Q" |
| }, |
| { |
| "value": 0.0012093, |
| "when": "!RESET_B&!D&GATE_N&!Q" |
| }, |
| { |
| "value": 0.0016213, |
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| }, |
| { |
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| }, |
| { |
| "value": 0.0010425, |
| "when": "RESET_B&!D&GATE_N&Q" |
| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VNB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "pwell", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "nwell", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VPWR" |
| }, |
| "pin D": { |
| "capacitance": 0.001772, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.001662, |
| "internal_power": { |
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| "index_1": [ |
| 0.01, |
| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
| 0.650743, |
| 1.5 |
| ], |
| "values": [ |
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| 0.0130062, |
| 0.0129991, |
| 0.0129828, |
| 0.0129453, |
| 0.0128587 |
| ] |
| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
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| 0.0062795, |
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| }, |
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| "related_power_pin": "VPWR", |
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| "timing": [ |
| { |
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| 0.75, |
| 1.5 |
| ], |
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| [ |
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| 0.5342265 |
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| ] |
| }, |
| "related_pin": "GATE_N", |
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| 0.01, |
| 0.75, |
| 1.5 |
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| [ |
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| ] |
| }, |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "setup_rising", |
| "violation_delay_degrade_pct": 10.0 |
| }, |
| { |
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| 0.75, |
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| ], |
| "index_2": [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "GATE_N", |
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| 0.01, |
| 0.75, |
| 1.5 |
| ], |
| "index_2": [ |
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| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "hold_rising", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| ] |
| }, |
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| "clock": "true", |
| "direction": "input", |
| "fall_capacitance": 0.001646, |
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| 0.0230506, |
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| 0.122474, |
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| 0.0122669 |
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| }, |
| "rise_power power_inputs_1": { |
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| }, |
| "max_transition": 1.5, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001882, |
| "timing": { |
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| "index_1": [ |
| 0.01, |
| 0.75, |
| 1.5 |
| ], |
| "values": [ |
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| }, |
| "related_pin": "GATE_N", |
| "sim_opt": "runlvl=5 accurate=1", |
| "timing_type": "min_pulse_width", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ", |
| "internal_power": [ |
| { |
| "fall_power power_outputs_1": { |
| "index_1": [ |
| 0.01, |
| 0.0230506, |
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| 0.122474, |
| 0.282311, |
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| }, |
| "related_pin": "D", |
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| { |
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| "related_pin": "GATE_N", |
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| }, |
| { |
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| "related_pin": "RESET_B", |
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| ], |
| "max_capacitance": 0.31106, |
| "max_transition": 1.519589, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
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| } |
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| }, |
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| "clock": "false", |
| "direction": "input", |
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| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| { |
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| { |
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| { |
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| "timing_type": "min_pulse_width", |
| "violation_delay_degrade_pct": 10.0 |
| } |
| ] |
| } |
| } |
