{
  "area": 22.5216,
  "cell_footprint": "sky130_fd_sc_hd__sdlclkp",
  "cell_leakage_power": 31.75887,
  "clock_gating_integrated_cell": "latch_posedge_precontrol",
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "leakage_power": [
    {
      "value": 35.1004026,
      "when": "CLK&!GATE&!GCLK&!SCE"
    },
    {
      "value": 27.4166752,
      "when": "!CLK&GATE&!GCLK&!SCE"
    },
    {
      "value": 27.1880882,
      "when": "!CLK&!GATE&!GCLK&SCE"
    },
    {
      "value": 29.2654896,
      "when": "CLK&!GATE&GCLK&SCE"
    },
    {
      "value": 23.4474804,
      "when": "!CLK&GATE&!GCLK&SCE"
    },
    {
      "value": 33.0877903,
      "when": "!CLK&!GATE&!GCLK&!SCE"
    },
    {
      "value": 29.4940872,
      "when": "CLK&GATE&GCLK&!SCE"
    },
    {
      "value": 25.524983,
      "when": "CLK&GATE&GCLK&SCE"
    },
    {
      "value": 41.1152286,
      "when": "CLK&GATE&!GCLK&!SCE"
    },
    {
      "value": 40.8866185,
      "when": "CLK&!GATE&!GCLK&SCE"
    },
    {
      "value": 37.1463358,
      "when": "CLK&GATE&!GCLK&SCE"
    },
    {
      "value": 31.4332311,
      "when": "CLK&!GATE&GCLK&!SCE"
    }
  ],
  "pg_pin,VGND": {
    "pg_type": "primary_ground",
    "related_bias_pin": "VPB",
    "voltage_name": "VGND"
  },
  "pg_pin,VNB": {
    "pg_type": "nwell",
    "physical_connection": "device_layer",
    "voltage_name": "VNB"
  },
  "pg_pin,VPB": {
    "pg_type": "pwell",
    "physical_connection": "device_layer",
    "voltage_name": "VPB"
  },
  "pg_pin,VPWR": {
    "pg_type": "primary_power",
    "related_bias_pin": "VNB",
    "voltage_name": "VPWR"
  },
  "pin,CLK": {
    "capacitance": 0.00452,
    "clock": "true",
    "clock_gate_clock_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.004238,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
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          0.0230506,
          0.0531329,
          0.122474,
          0.282311,
          0.650743,
          1.5
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        "values": [
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          0.0238966,
          0.0235753,
          0.0247938,
          0.0276558,
          0.0343064,
          0.0496898
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      },
      "rise_power,power_inputs_1": {
        "index_1": [
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          0.0531329,
          0.122474,
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          0.650743,
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        "values": [
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          0.0084886,
          0.0096673,
          0.0124266,
          0.0188295,
          0.0336306
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      }
    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.004802,
    "timing": {
      "fall_constraint,constraint_3_0_1": {
        "index_1": [
          0.01,
          0.5,
          1.5
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        "values": [
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          0.8333333,
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      },
      "related_output_pin": "GCLK",
      "related_pin": "CLK",
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10
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  },
  "pin,GATE": {
    "capacitance": 0.002045,
    "clock": "false",
    "clock_gate_enable_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001906,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
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          0.0230506,
          0.0531329,
          0.122474,
          0.282311,
          0.650743,
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        "values": [
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          0.0569578
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      },
      "rise_power,power_inputs_1": {
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          0.650743,
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        "values": [
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          0.0183968,
          0.0194516,
          0.0219329,
          0.0277025,
          0.0410517
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    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.002184,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
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          "index_2": [
            0.01,
            0.5,
            1.5
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          "values": [
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              0.0984355,
              0.2394186,
              0.4400208
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            [
              0.0624329,
              0.2046367,
              0.4101217
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            [
              0.0778952,
              0.2164368,
              0.425584
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
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          "index_2": [
            0.01,
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            1.5
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          "values": [
            [
              0.0947734,
              0.1478659,
              0.1189759
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            [
              0.1246888,
              0.1716777,
              0.1366842
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            [
              0.3061667,
              0.3531556,
              0.3181621
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
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      {
        "fall_constraint,vio_3_3_1": {
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            1.5
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          "index_2": [
            0.01,
            0.5,
            1.5
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          "values": [
            [
              -0.0797871,
              -0.213446,
              -0.398179
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            [
              -0.0547708,
              -0.1945332,
              -0.3951354
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            [
              -0.0726745,
              -0.2087747,
              -0.4142598
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
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            0.01,
            0.5,
            1.5
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          "index_2": [
            0.01,
            0.5,
            1.5
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          "values": [
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              -0.0358418,
              -0.0828307,
              -0.0417337
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            [
              -0.0279154,
              -0.0700215,
              -0.0338073
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            [
              -0.0702331,
              -0.1135599,
              -0.0858906
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
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    ]
  },
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    "clock_gate_out_pin": "true",
    "direction": "output",
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          0.1224745,
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          0.6507428,
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          0.005760159,
          0.0195509,
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          0.2252325,
          0.7644751
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            0.0479318,
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            0.036635,
            0.0148124,
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            0.0481835,
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            0.0369637,
            0.0149804,
            -0.0654763,
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          [
            0.0499745,
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            0.0385353,
            0.0163991,
            -0.0650169,
            -0.3665308,
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          [
            0.0644931,
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            0.0516287,
            0.0247703,
            -0.0613061,
            -0.3638896,
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          [
            0.0905385,
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            0.0757825,
            0.0430936,
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            -0.3558078,
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            0.119522,
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            -0.3349633,
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      "related_pin": "CLK",
      "rise_power,power_outputs_1": {
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            1.4815583
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    },
    "max_capacitance": 0.764475,
    "max_transition": 1.49913,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "state_function": "(CLK*M0)",
    "timing": {
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      },
      "cell_rise,del_1_7_7": {
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            0.4023527,
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      "fall_transition,del_1_7_7": {
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          0.650743,
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        "index_2": [
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          0.764475
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        "values": [
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            0.020626,
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            0.0278472,
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            0.020568,
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            0.0206228,
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      "related_pin": "CLK",
      "rise_transition,del_1_7_7": {
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        "index_2": [
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            0.0192276,
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            1.4961038
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            0.0193087,
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            0.020057,
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            1.4971883
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        ]
      },
      "timing_sense": "positive_unate",
      "timing_type": "combinational"
    }
  },
  "pin,M0": {
    "direction": "internal",
    "internal_node": "M0",
    "related_ground_pin": "VNB",
    "related_power_pin": "VPWR"
  },
  "pin,SCE": {
    "capacitance": 0.001962,
    "clock": "false",
    "clock_gate_test_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001899,
    "internal_power": {
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        "index_1": [
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          0.0531329,
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          0.282311,
          0.650743,
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        "values": [
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      },
      "rise_power,power_inputs_1": {
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          0.122474,
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          0.650743,
          1.5
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        "values": [
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    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.002024,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              0.1069805,
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            [
              0.0697572,
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              0.3417624
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            [
              0.082778,
              0.1895814,
              0.359666
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
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            1.5
          ],
          "values": [
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              0.1045391,
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              0.1332337,
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            [
              0.3147116,
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              0.3779766
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        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              -0.088332,
              -0.1853698,
              -0.3310404
            ],
            [
              -0.062095,
              -0.1676777,
              -0.3279968
            ],
            [
              -0.0775573,
              -0.18314,
              -0.3483418
            ]
          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
            [
              -0.0443867,
              -0.1060241,
              -0.1015482
            ],
            [
              -0.0401224,
              -0.0944355,
              -0.0936217
            ],
            [
              -0.0861022,
              -0.1391947,
              -0.1432637
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "statetable,CLK GATE SCE,M0": {
    "table": [
      "L L L : - : L",
      "L L H : - : H",
      "L H L : - : H",
      "L H H : - : H",
      "H - - : - : N"
    ]
  }
}