tree 45505768d2dcfe28d2772a60e2260dc66e3724a5
parent 28019fca60c8a65d4a37a3ec0db0b90a1fe26630
parent 25ed6683d31d66fc8e3d6bb157b300250a557edb
author Tim 'mithro' Ansell <me@mith.ro> 1605025190 -0800
committer Tim 'mithro' Ansell <tansell@google.com> 1605027045 -0800

verilog: Fixing spurious `wire 1'b0` definition in lpflow_inputisolatch.

Fixes https://github.com/google/skywater-pdk/issues/178.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
Signed-off-by: Tim Edwards <tim@opencircuitdesign.com>