verilog: Fixing power pins usage in non-powerpin mode. Previously even when `USE_POWER_PIN` was not defined, the drive strength wrappers where still defining the power pins as ports. Fixes https://github.com/google/skywater-pdk/issues/181 Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>

diff --git a/cells/a2111o/sky130_fd_sc_hd__a2111o_1.v b/cells/a2111o/sky130_fd_sc_hd__a2111o_1.v
index 7096d78..85641fa 100644
--- a/cells/a2111o/sky130_fd_sc_hd__a2111o_1.v
+++ b/cells/a2111o/sky130_fd_sc_hd__a2111o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111o/sky130_fd_sc_hd__a2111o_2.v b/cells/a2111o/sky130_fd_sc_hd__a2111o_2.v
index bb28e56..7d551eb 100644
--- a/cells/a2111o/sky130_fd_sc_hd__a2111o_2.v
+++ b/cells/a2111o/sky130_fd_sc_hd__a2111o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111o/sky130_fd_sc_hd__a2111o_4.v b/cells/a2111o/sky130_fd_sc_hd__a2111o_4.v
index 2a59677..1b7f124 100644
--- a/cells/a2111o/sky130_fd_sc_hd__a2111o_4.v
+++ b/cells/a2111o/sky130_fd_sc_hd__a2111o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_0.v b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_0.v
index bde752d..67f02f8 100644
--- a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_0.v
+++ b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_0.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111oi_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_1.v b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_1.v
index 51fcf12..2b3b314 100644
--- a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_1.v
+++ b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_2.v b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_2.v
index 0890f7f..f17c73a 100644
--- a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_2.v
+++ b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_4.v b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_4.v
index 957bd40..2552ec4 100644
--- a/cells/a2111oi/sky130_fd_sc_hd__a2111oi_4.v
+++ b/cells/a2111oi/sky130_fd_sc_hd__a2111oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a2111oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_hd__a211o_1.v b/cells/a211o/sky130_fd_sc_hd__a211o_1.v
index 89269be..9f315e6 100644
--- a/cells/a211o/sky130_fd_sc_hd__a211o_1.v
+++ b/cells/a211o/sky130_fd_sc_hd__a211o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_hd__a211o_2.v b/cells/a211o/sky130_fd_sc_hd__a211o_2.v
index efd819f..60b1ecb 100644
--- a/cells/a211o/sky130_fd_sc_hd__a211o_2.v
+++ b/cells/a211o/sky130_fd_sc_hd__a211o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211o/sky130_fd_sc_hd__a211o_4.v b/cells/a211o/sky130_fd_sc_hd__a211o_4.v
index 6c71913..c49ef5e 100644
--- a/cells/a211o/sky130_fd_sc_hd__a211o_4.v
+++ b/cells/a211o/sky130_fd_sc_hd__a211o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_hd__a211oi_1.v b/cells/a211oi/sky130_fd_sc_hd__a211oi_1.v
index 94d89c4..58f1192 100644
--- a/cells/a211oi/sky130_fd_sc_hd__a211oi_1.v
+++ b/cells/a211oi/sky130_fd_sc_hd__a211oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_hd__a211oi_2.v b/cells/a211oi/sky130_fd_sc_hd__a211oi_2.v
index 0cbe0e7..08dbeb5 100644
--- a/cells/a211oi/sky130_fd_sc_hd__a211oi_2.v
+++ b/cells/a211oi/sky130_fd_sc_hd__a211oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a211oi/sky130_fd_sc_hd__a211oi_4.v b/cells/a211oi/sky130_fd_sc_hd__a211oi_4.v
index 58f2aea..0d2153c 100644
--- a/cells/a211oi/sky130_fd_sc_hd__a211oi_4.v
+++ b/cells/a211oi/sky130_fd_sc_hd__a211oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a211oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_hd__a21bo_1.v b/cells/a21bo/sky130_fd_sc_hd__a21bo_1.v
index 54417c4..c2f0782 100644
--- a/cells/a21bo/sky130_fd_sc_hd__a21bo_1.v
+++ b/cells/a21bo/sky130_fd_sc_hd__a21bo_1.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_hd__a21bo_2.v b/cells/a21bo/sky130_fd_sc_hd__a21bo_2.v
index 83e3bc1..5c3ca0c 100644
--- a/cells/a21bo/sky130_fd_sc_hd__a21bo_2.v
+++ b/cells/a21bo/sky130_fd_sc_hd__a21bo_2.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21bo/sky130_fd_sc_hd__a21bo_4.v b/cells/a21bo/sky130_fd_sc_hd__a21bo_4.v
index 46aa903..7deb9a7 100644
--- a/cells/a21bo/sky130_fd_sc_hd__a21bo_4.v
+++ b/cells/a21bo/sky130_fd_sc_hd__a21bo_4.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_hd__a21boi_0.v b/cells/a21boi/sky130_fd_sc_hd__a21boi_0.v
index 795a3e8..5f0cf21 100644
--- a/cells/a21boi/sky130_fd_sc_hd__a21boi_0.v
+++ b/cells/a21boi/sky130_fd_sc_hd__a21boi_0.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_hd__a21boi_1.v b/cells/a21boi/sky130_fd_sc_hd__a21boi_1.v
index 117b3e0..d5ab9e6 100644
--- a/cells/a21boi/sky130_fd_sc_hd__a21boi_1.v
+++ b/cells/a21boi/sky130_fd_sc_hd__a21boi_1.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_hd__a21boi_2.v b/cells/a21boi/sky130_fd_sc_hd__a21boi_2.v
index 68dca43..adfbb36 100644
--- a/cells/a21boi/sky130_fd_sc_hd__a21boi_2.v
+++ b/cells/a21boi/sky130_fd_sc_hd__a21boi_2.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21boi/sky130_fd_sc_hd__a21boi_4.v b/cells/a21boi/sky130_fd_sc_hd__a21boi_4.v
index 1835421..a744c1b 100644
--- a/cells/a21boi/sky130_fd_sc_hd__a21boi_4.v
+++ b/cells/a21boi/sky130_fd_sc_hd__a21boi_4.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_hd__a21o_1.v b/cells/a21o/sky130_fd_sc_hd__a21o_1.v
index 29fc35e..5cafe55 100644
--- a/cells/a21o/sky130_fd_sc_hd__a21o_1.v
+++ b/cells/a21o/sky130_fd_sc_hd__a21o_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_hd__a21o_2.v b/cells/a21o/sky130_fd_sc_hd__a21o_2.v
index f5e7e3c..154703f 100644
--- a/cells/a21o/sky130_fd_sc_hd__a21o_2.v
+++ b/cells/a21o/sky130_fd_sc_hd__a21o_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21o/sky130_fd_sc_hd__a21o_4.v b/cells/a21o/sky130_fd_sc_hd__a21o_4.v
index f6f5877..e64a5db 100644
--- a/cells/a21o/sky130_fd_sc_hd__a21o_4.v
+++ b/cells/a21o/sky130_fd_sc_hd__a21o_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_hd__a21oi_1.v b/cells/a21oi/sky130_fd_sc_hd__a21oi_1.v
index ae044f8..4434e90 100644
--- a/cells/a21oi/sky130_fd_sc_hd__a21oi_1.v
+++ b/cells/a21oi/sky130_fd_sc_hd__a21oi_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_hd__a21oi_2.v b/cells/a21oi/sky130_fd_sc_hd__a21oi_2.v
index 8efff30..4b59b8c 100644
--- a/cells/a21oi/sky130_fd_sc_hd__a21oi_2.v
+++ b/cells/a21oi/sky130_fd_sc_hd__a21oi_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a21oi/sky130_fd_sc_hd__a21oi_4.v b/cells/a21oi/sky130_fd_sc_hd__a21oi_4.v
index e65e63a..f849645 100644
--- a/cells/a21oi/sky130_fd_sc_hd__a21oi_4.v
+++ b/cells/a21oi/sky130_fd_sc_hd__a21oi_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__a21oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_hd__a221o_1.v b/cells/a221o/sky130_fd_sc_hd__a221o_1.v
index 590357b..3abb501 100644
--- a/cells/a221o/sky130_fd_sc_hd__a221o_1.v
+++ b/cells/a221o/sky130_fd_sc_hd__a221o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_hd__a221o_2.v b/cells/a221o/sky130_fd_sc_hd__a221o_2.v
index bdb5eb7..c58aaba 100644
--- a/cells/a221o/sky130_fd_sc_hd__a221o_2.v
+++ b/cells/a221o/sky130_fd_sc_hd__a221o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221o/sky130_fd_sc_hd__a221o_4.v b/cells/a221o/sky130_fd_sc_hd__a221o_4.v
index 838f51f..d903563 100644
--- a/cells/a221o/sky130_fd_sc_hd__a221o_4.v
+++ b/cells/a221o/sky130_fd_sc_hd__a221o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_hd__a221oi_1.v b/cells/a221oi/sky130_fd_sc_hd__a221oi_1.v
index 1b80851..34a20eb 100644
--- a/cells/a221oi/sky130_fd_sc_hd__a221oi_1.v
+++ b/cells/a221oi/sky130_fd_sc_hd__a221oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_hd__a221oi_2.v b/cells/a221oi/sky130_fd_sc_hd__a221oi_2.v
index 4209b2b..35a7d33 100644
--- a/cells/a221oi/sky130_fd_sc_hd__a221oi_2.v
+++ b/cells/a221oi/sky130_fd_sc_hd__a221oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a221oi/sky130_fd_sc_hd__a221oi_4.v b/cells/a221oi/sky130_fd_sc_hd__a221oi_4.v
index 1a04c28..e75f4eb 100644
--- a/cells/a221oi/sky130_fd_sc_hd__a221oi_4.v
+++ b/cells/a221oi/sky130_fd_sc_hd__a221oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a221oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a222oi/sky130_fd_sc_hd__a222oi_1.v b/cells/a222oi/sky130_fd_sc_hd__a222oi_1.v
index 1c6dcf4..aaa577a 100644
--- a/cells/a222oi/sky130_fd_sc_hd__a222oi_1.v
+++ b/cells/a222oi/sky130_fd_sc_hd__a222oi_1.v

@@ -86,30 +86,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__a222oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    C2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1,
+    C2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  C2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
+    input  C2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_hd__a22o_1.v b/cells/a22o/sky130_fd_sc_hd__a22o_1.v
index 2fedce6..c0c95bf 100644
--- a/cells/a22o/sky130_fd_sc_hd__a22o_1.v
+++ b/cells/a22o/sky130_fd_sc_hd__a22o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_hd__a22o_2.v b/cells/a22o/sky130_fd_sc_hd__a22o_2.v
index 6bf5bc7..5c03923 100644
--- a/cells/a22o/sky130_fd_sc_hd__a22o_2.v
+++ b/cells/a22o/sky130_fd_sc_hd__a22o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22o/sky130_fd_sc_hd__a22o_4.v b/cells/a22o/sky130_fd_sc_hd__a22o_4.v
index 501b3e3..2dbffd8 100644
--- a/cells/a22o/sky130_fd_sc_hd__a22o_4.v
+++ b/cells/a22o/sky130_fd_sc_hd__a22o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_hd__a22oi_1.v b/cells/a22oi/sky130_fd_sc_hd__a22oi_1.v
index 2a84aa5..94a8ac3 100644
--- a/cells/a22oi/sky130_fd_sc_hd__a22oi_1.v
+++ b/cells/a22oi/sky130_fd_sc_hd__a22oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_hd__a22oi_2.v b/cells/a22oi/sky130_fd_sc_hd__a22oi_2.v
index 24233d1..9bb70d9 100644
--- a/cells/a22oi/sky130_fd_sc_hd__a22oi_2.v
+++ b/cells/a22oi/sky130_fd_sc_hd__a22oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a22oi/sky130_fd_sc_hd__a22oi_4.v b/cells/a22oi/sky130_fd_sc_hd__a22oi_4.v
index ff6ac1b..8432998 100644
--- a/cells/a22oi/sky130_fd_sc_hd__a22oi_4.v
+++ b/cells/a22oi/sky130_fd_sc_hd__a22oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a22oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_1.v b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_1.v
index ce1a05c..d3cf87e 100644
--- a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_1.v
+++ b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_1.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_2.v b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_2.v
index 8c33cc6..105e124 100644
--- a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_2.v
+++ b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_2.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_4.v b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_4.v
index ab11c32..569feac 100644
--- a/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_4.v
+++ b/cells/a2bb2o/sky130_fd_sc_hd__a2bb2o_4.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_1.v b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_1.v
index 7ee9d43..86e264b 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_1.v
+++ b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_1.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_2.v b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_2.v
index ac9fb4c..19dbb59 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_2.v
+++ b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_2.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_4.v b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_4.v
index d7c55df..d6ed60c 100644
--- a/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_4.v
+++ b/cells/a2bb2oi/sky130_fd_sc_hd__a2bb2oi_4.v

@@ -85,11 +85,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -97,10 +93,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_hd__a311o_1.v b/cells/a311o/sky130_fd_sc_hd__a311o_1.v
index ab23e9b..3f63bf1 100644
--- a/cells/a311o/sky130_fd_sc_hd__a311o_1.v
+++ b/cells/a311o/sky130_fd_sc_hd__a311o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_hd__a311o_2.v b/cells/a311o/sky130_fd_sc_hd__a311o_2.v
index 029e40e..eb4153b 100644
--- a/cells/a311o/sky130_fd_sc_hd__a311o_2.v
+++ b/cells/a311o/sky130_fd_sc_hd__a311o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311o/sky130_fd_sc_hd__a311o_4.v b/cells/a311o/sky130_fd_sc_hd__a311o_4.v
index b7b2502..df55f3e 100644
--- a/cells/a311o/sky130_fd_sc_hd__a311o_4.v
+++ b/cells/a311o/sky130_fd_sc_hd__a311o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_hd__a311oi_1.v b/cells/a311oi/sky130_fd_sc_hd__a311oi_1.v
index f6b16e1..1d319a3 100644
--- a/cells/a311oi/sky130_fd_sc_hd__a311oi_1.v
+++ b/cells/a311oi/sky130_fd_sc_hd__a311oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_hd__a311oi_2.v b/cells/a311oi/sky130_fd_sc_hd__a311oi_2.v
index fdda417..40c1033 100644
--- a/cells/a311oi/sky130_fd_sc_hd__a311oi_2.v
+++ b/cells/a311oi/sky130_fd_sc_hd__a311oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a311oi/sky130_fd_sc_hd__a311oi_4.v b/cells/a311oi/sky130_fd_sc_hd__a311oi_4.v
index 874393c..fc4446d 100644
--- a/cells/a311oi/sky130_fd_sc_hd__a311oi_4.v
+++ b/cells/a311oi/sky130_fd_sc_hd__a311oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a311oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_hd__a31o_1.v b/cells/a31o/sky130_fd_sc_hd__a31o_1.v
index 7e5a7be..853f4dd 100644
--- a/cells/a31o/sky130_fd_sc_hd__a31o_1.v
+++ b/cells/a31o/sky130_fd_sc_hd__a31o_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_hd__a31o_2.v b/cells/a31o/sky130_fd_sc_hd__a31o_2.v
index 125a916..5e66313 100644
--- a/cells/a31o/sky130_fd_sc_hd__a31o_2.v
+++ b/cells/a31o/sky130_fd_sc_hd__a31o_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31o/sky130_fd_sc_hd__a31o_4.v b/cells/a31o/sky130_fd_sc_hd__a31o_4.v
index b3aaa70..bb28bbe 100644
--- a/cells/a31o/sky130_fd_sc_hd__a31o_4.v
+++ b/cells/a31o/sky130_fd_sc_hd__a31o_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_hd__a31oi_1.v b/cells/a31oi/sky130_fd_sc_hd__a31oi_1.v
index 3348999..84e3c19 100644
--- a/cells/a31oi/sky130_fd_sc_hd__a31oi_1.v
+++ b/cells/a31oi/sky130_fd_sc_hd__a31oi_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_hd__a31oi_2.v b/cells/a31oi/sky130_fd_sc_hd__a31oi_2.v
index 700ac54..6c74217 100644
--- a/cells/a31oi/sky130_fd_sc_hd__a31oi_2.v
+++ b/cells/a31oi/sky130_fd_sc_hd__a31oi_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a31oi/sky130_fd_sc_hd__a31oi_4.v b/cells/a31oi/sky130_fd_sc_hd__a31oi_4.v
index f9da08b..8cc999f 100644
--- a/cells/a31oi/sky130_fd_sc_hd__a31oi_4.v
+++ b/cells/a31oi/sky130_fd_sc_hd__a31oi_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__a31oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_hd__a32o_1.v b/cells/a32o/sky130_fd_sc_hd__a32o_1.v
index 6345e74..b6c9c89 100644
--- a/cells/a32o/sky130_fd_sc_hd__a32o_1.v
+++ b/cells/a32o/sky130_fd_sc_hd__a32o_1.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_hd__a32o_2.v b/cells/a32o/sky130_fd_sc_hd__a32o_2.v
index d4a9a05..4d51247 100644
--- a/cells/a32o/sky130_fd_sc_hd__a32o_2.v
+++ b/cells/a32o/sky130_fd_sc_hd__a32o_2.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32o/sky130_fd_sc_hd__a32o_4.v b/cells/a32o/sky130_fd_sc_hd__a32o_4.v
index f8d8fe1..d7cb4cc 100644
--- a/cells/a32o/sky130_fd_sc_hd__a32o_4.v
+++ b/cells/a32o/sky130_fd_sc_hd__a32o_4.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_hd__a32oi_1.v b/cells/a32oi/sky130_fd_sc_hd__a32oi_1.v
index 13ac5f5..adeb654 100644
--- a/cells/a32oi/sky130_fd_sc_hd__a32oi_1.v
+++ b/cells/a32oi/sky130_fd_sc_hd__a32oi_1.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_hd__a32oi_2.v b/cells/a32oi/sky130_fd_sc_hd__a32oi_2.v
index 0345887..7aa52f5 100644
--- a/cells/a32oi/sky130_fd_sc_hd__a32oi_2.v
+++ b/cells/a32oi/sky130_fd_sc_hd__a32oi_2.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a32oi/sky130_fd_sc_hd__a32oi_4.v b/cells/a32oi/sky130_fd_sc_hd__a32oi_4.v
index da1bb1f..e9578b0 100644
--- a/cells/a32oi/sky130_fd_sc_hd__a32oi_4.v
+++ b/cells/a32oi/sky130_fd_sc_hd__a32oi_4.v

@@ -84,28 +84,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a32oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_hd__a41o_1.v b/cells/a41o/sky130_fd_sc_hd__a41o_1.v
index ce5897b..6a7d62b 100644
--- a/cells/a41o/sky130_fd_sc_hd__a41o_1.v
+++ b/cells/a41o/sky130_fd_sc_hd__a41o_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41o_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_hd__a41o_2.v b/cells/a41o/sky130_fd_sc_hd__a41o_2.v
index a8e2524..5f0977c 100644
--- a/cells/a41o/sky130_fd_sc_hd__a41o_2.v
+++ b/cells/a41o/sky130_fd_sc_hd__a41o_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41o_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41o/sky130_fd_sc_hd__a41o_4.v b/cells/a41o/sky130_fd_sc_hd__a41o_4.v
index 929ee83..4232357 100644
--- a/cells/a41o/sky130_fd_sc_hd__a41o_4.v
+++ b/cells/a41o/sky130_fd_sc_hd__a41o_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41o_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_hd__a41oi_1.v b/cells/a41oi/sky130_fd_sc_hd__a41oi_1.v
index b0e59db..5a7b270 100644
--- a/cells/a41oi/sky130_fd_sc_hd__a41oi_1.v
+++ b/cells/a41oi/sky130_fd_sc_hd__a41oi_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41oi_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_hd__a41oi_2.v b/cells/a41oi/sky130_fd_sc_hd__a41oi_2.v
index 3408d08..d6c2aca 100644
--- a/cells/a41oi/sky130_fd_sc_hd__a41oi_2.v
+++ b/cells/a41oi/sky130_fd_sc_hd__a41oi_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41oi_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/a41oi/sky130_fd_sc_hd__a41oi_4.v b/cells/a41oi/sky130_fd_sc_hd__a41oi_4.v
index 8f479f0..031ecad 100644
--- a/cells/a41oi/sky130_fd_sc_hd__a41oi_4.v
+++ b/cells/a41oi/sky130_fd_sc_hd__a41oi_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__a41oi_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_hd__and2_0.v b/cells/and2/sky130_fd_sc_hd__and2_0.v
index 8ed8b91..cede4ae 100644
--- a/cells/and2/sky130_fd_sc_hd__and2_0.v
+++ b/cells/and2/sky130_fd_sc_hd__and2_0.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2_0 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_hd__and2_1.v b/cells/and2/sky130_fd_sc_hd__and2_1.v
index c8fd920..6b81d0f 100644
--- a/cells/and2/sky130_fd_sc_hd__and2_1.v
+++ b/cells/and2/sky130_fd_sc_hd__and2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_hd__and2_2.v b/cells/and2/sky130_fd_sc_hd__and2_2.v
index a10a54e..532ccb3 100644
--- a/cells/and2/sky130_fd_sc_hd__and2_2.v
+++ b/cells/and2/sky130_fd_sc_hd__and2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2/sky130_fd_sc_hd__and2_4.v b/cells/and2/sky130_fd_sc_hd__and2_4.v
index 3a5caac..3e53819 100644
--- a/cells/and2/sky130_fd_sc_hd__and2_4.v
+++ b/cells/and2/sky130_fd_sc_hd__and2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_hd__and2b_1.v b/cells/and2b/sky130_fd_sc_hd__and2b_1.v
index 620ef74..cc04716 100644
--- a/cells/and2b/sky130_fd_sc_hd__and2b_1.v
+++ b/cells/and2b/sky130_fd_sc_hd__and2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_hd__and2b_2.v b/cells/and2b/sky130_fd_sc_hd__and2b_2.v
index 0c94557..222b5b1 100644
--- a/cells/and2b/sky130_fd_sc_hd__and2b_2.v
+++ b/cells/and2b/sky130_fd_sc_hd__and2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and2b/sky130_fd_sc_hd__and2b_4.v b/cells/and2b/sky130_fd_sc_hd__and2b_4.v
index e6defc1..5e83d99 100644
--- a/cells/and2b/sky130_fd_sc_hd__and2b_4.v
+++ b/cells/and2b/sky130_fd_sc_hd__and2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__and2b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_hd__and3_1.v b/cells/and3/sky130_fd_sc_hd__and3_1.v
index f9eb480..e0b6110 100644
--- a/cells/and3/sky130_fd_sc_hd__and3_1.v
+++ b/cells/and3/sky130_fd_sc_hd__and3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_hd__and3_2.v b/cells/and3/sky130_fd_sc_hd__and3_2.v
index 37f3259..2688253 100644
--- a/cells/and3/sky130_fd_sc_hd__and3_2.v
+++ b/cells/and3/sky130_fd_sc_hd__and3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3/sky130_fd_sc_hd__and3_4.v b/cells/and3/sky130_fd_sc_hd__and3_4.v
index 5093fef..1bb0c86 100644
--- a/cells/and3/sky130_fd_sc_hd__and3_4.v
+++ b/cells/and3/sky130_fd_sc_hd__and3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_hd__and3b_1.v b/cells/and3b/sky130_fd_sc_hd__and3b_1.v
index fb6fc88..b373b29 100644
--- a/cells/and3b/sky130_fd_sc_hd__and3b_1.v
+++ b/cells/and3b/sky130_fd_sc_hd__and3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_hd__and3b_2.v b/cells/and3b/sky130_fd_sc_hd__and3b_2.v
index 7f7c7b0..75cd2ae 100644
--- a/cells/and3b/sky130_fd_sc_hd__and3b_2.v
+++ b/cells/and3b/sky130_fd_sc_hd__and3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and3b/sky130_fd_sc_hd__and3b_4.v b/cells/and3b/sky130_fd_sc_hd__and3b_4.v
index 14b591c..4de4190 100644
--- a/cells/and3b/sky130_fd_sc_hd__and3b_4.v
+++ b/cells/and3b/sky130_fd_sc_hd__and3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__and3b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_hd__and4_1.v b/cells/and4/sky130_fd_sc_hd__and4_1.v
index 7346f1d..c879b39 100644
--- a/cells/and4/sky130_fd_sc_hd__and4_1.v
+++ b/cells/and4/sky130_fd_sc_hd__and4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_hd__and4_2.v b/cells/and4/sky130_fd_sc_hd__and4_2.v
index 08927af..0ea03ca 100644
--- a/cells/and4/sky130_fd_sc_hd__and4_2.v
+++ b/cells/and4/sky130_fd_sc_hd__and4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4/sky130_fd_sc_hd__and4_4.v b/cells/and4/sky130_fd_sc_hd__and4_4.v
index e38f606..e0265c0 100644
--- a/cells/and4/sky130_fd_sc_hd__and4_4.v
+++ b/cells/and4/sky130_fd_sc_hd__and4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_hd__and4b_1.v b/cells/and4b/sky130_fd_sc_hd__and4b_1.v
index ed744b8..e98a6a6 100644
--- a/cells/and4b/sky130_fd_sc_hd__and4b_1.v
+++ b/cells/and4b/sky130_fd_sc_hd__and4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4b_1 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_hd__and4b_2.v b/cells/and4b/sky130_fd_sc_hd__and4b_2.v
index 73a092c..b880604 100644
--- a/cells/and4b/sky130_fd_sc_hd__and4b_2.v
+++ b/cells/and4b/sky130_fd_sc_hd__and4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4b_2 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4b/sky130_fd_sc_hd__and4b_4.v b/cells/and4b/sky130_fd_sc_hd__and4b_4.v
index a43f48f..d61f9bc 100644
--- a/cells/and4b/sky130_fd_sc_hd__and4b_4.v
+++ b/cells/and4b/sky130_fd_sc_hd__and4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4b_4 (
-    X   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_hd__and4bb_1.v b/cells/and4bb/sky130_fd_sc_hd__and4bb_1.v
index 780ee72..3123e92 100644
--- a/cells/and4bb/sky130_fd_sc_hd__and4bb_1.v
+++ b/cells/and4bb/sky130_fd_sc_hd__and4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4bb_1 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_hd__and4bb_2.v b/cells/and4bb/sky130_fd_sc_hd__and4bb_2.v
index 1a0d3fd..9472469 100644
--- a/cells/and4bb/sky130_fd_sc_hd__and4bb_2.v
+++ b/cells/and4bb/sky130_fd_sc_hd__and4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4bb_2 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/and4bb/sky130_fd_sc_hd__and4bb_4.v b/cells/and4bb/sky130_fd_sc_hd__and4bb_4.v
index 8482f43..c073941 100644
--- a/cells/and4bb/sky130_fd_sc_hd__and4bb_4.v
+++ b/cells/and4bb/sky130_fd_sc_hd__and4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__and4bb_4 (
-    X   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output X   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_1.v b/cells/buf/sky130_fd_sc_hd__buf_1.v
index 239defd..a051bdd 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_1.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_12.v b/cells/buf/sky130_fd_sc_hd__buf_12.v
index 83975e9..7a1eb87 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_12.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_12.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_12 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_16.v b/cells/buf/sky130_fd_sc_hd__buf_16.v
index 5264607..60fec12 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_16.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_2.v b/cells/buf/sky130_fd_sc_hd__buf_2.v
index 5e88c12..4c6a79e 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_2.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_4.v b/cells/buf/sky130_fd_sc_hd__buf_4.v
index 214b1a8..cb74d67 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_4.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_6.v b/cells/buf/sky130_fd_sc_hd__buf_6.v
index 054904f..b17c483 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_6.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_6.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_6 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/buf/sky130_fd_sc_hd__buf_8.v b/cells/buf/sky130_fd_sc_hd__buf_8.v
index 41064d2..b6d4412 100644
--- a/cells/buf/sky130_fd_sc_hd__buf_8.v
+++ b/cells/buf/sky130_fd_sc_hd__buf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__buf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufbuf/sky130_fd_sc_hd__bufbuf_16.v b/cells/bufbuf/sky130_fd_sc_hd__bufbuf_16.v
index d8e5be2..d54d0ff 100644
--- a/cells/bufbuf/sky130_fd_sc_hd__bufbuf_16.v
+++ b/cells/bufbuf/sky130_fd_sc_hd__bufbuf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__bufbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufbuf/sky130_fd_sc_hd__bufbuf_8.v b/cells/bufbuf/sky130_fd_sc_hd__bufbuf_8.v
index e69724e..bc96729 100644
--- a/cells/bufbuf/sky130_fd_sc_hd__bufbuf_8.v
+++ b/cells/bufbuf/sky130_fd_sc_hd__bufbuf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__bufbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufinv/sky130_fd_sc_hd__bufinv_16.v b/cells/bufinv/sky130_fd_sc_hd__bufinv_16.v
index 46f2bba..22df0a9 100644
--- a/cells/bufinv/sky130_fd_sc_hd__bufinv_16.v
+++ b/cells/bufinv/sky130_fd_sc_hd__bufinv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__bufinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/bufinv/sky130_fd_sc_hd__bufinv_8.v b/cells/bufinv/sky130_fd_sc_hd__bufinv_8.v
index 4a2c65d..a76c5a2 100644
--- a/cells/bufinv/sky130_fd_sc_hd__bufinv_8.v
+++ b/cells/bufinv/sky130_fd_sc_hd__bufinv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__bufinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_1.v b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_1.v
index 124081d..8658c5a 100644
--- a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_1.v
+++ b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkbuf_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_16.v b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_16.v
index dcc4f13..6a17603 100644
--- a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_16.v
+++ b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkbuf_16 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_2.v b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_2.v
index 4ffd83a..ff3cd28 100644
--- a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_2.v
+++ b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkbuf_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_4.v b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_4.v
index 78f1da8..9cf5f52 100644
--- a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_4.v
+++ b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkbuf_4 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_8.v b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_8.v
index bba4efc..25b48c1 100644
--- a/cells/clkbuf/sky130_fd_sc_hd__clkbuf_8.v
+++ b/cells/clkbuf/sky130_fd_sc_hd__clkbuf_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkbuf_8 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_1.v b/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_1.v
index 16caf32..b6308cc 100644
--- a/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_1.v
+++ b/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s15_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_2.v b/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_2.v
index 41a828b..ce21a40 100644
--- a/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_2.v
+++ b/cells/clkdlybuf4s15/sky130_fd_sc_hd__clkdlybuf4s15_2.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s15_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_1.v b/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_1.v
index 334a348..b2d9d0c 100644
--- a/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_1.v
+++ b/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s18_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_2.v b/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_2.v
index 17f91c4..00a6476 100644
--- a/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_2.v
+++ b/cells/clkdlybuf4s18/sky130_fd_sc_hd__clkdlybuf4s18_2.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s18_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_1.v b/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_1.v
index b73c600..043ebf1 100644
--- a/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_1.v
+++ b/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s25_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_2.v b/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_2.v
index 1e23c46..f38c1c0 100644
--- a/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_2.v
+++ b/cells/clkdlybuf4s25/sky130_fd_sc_hd__clkdlybuf4s25_2.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s25_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_1.v b/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_1.v
index 04519d2..6223cd1 100644
--- a/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_1.v
+++ b/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s50_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_2.v b/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_2.v
index c3d516c..14819f2 100644
--- a/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_2.v
+++ b/cells/clkdlybuf4s50/sky130_fd_sc_hd__clkdlybuf4s50_2.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkdlybuf4s50_2 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_hd__clkinv_1.v b/cells/clkinv/sky130_fd_sc_hd__clkinv_1.v
index 393f7bf..74916ac 100644
--- a/cells/clkinv/sky130_fd_sc_hd__clkinv_1.v
+++ b/cells/clkinv/sky130_fd_sc_hd__clkinv_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_hd__clkinv_16.v b/cells/clkinv/sky130_fd_sc_hd__clkinv_16.v
index ae3e856..5fd42fd 100644
--- a/cells/clkinv/sky130_fd_sc_hd__clkinv_16.v
+++ b/cells/clkinv/sky130_fd_sc_hd__clkinv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_hd__clkinv_2.v b/cells/clkinv/sky130_fd_sc_hd__clkinv_2.v
index 5bc2920..2ac393d 100644
--- a/cells/clkinv/sky130_fd_sc_hd__clkinv_2.v
+++ b/cells/clkinv/sky130_fd_sc_hd__clkinv_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_hd__clkinv_4.v b/cells/clkinv/sky130_fd_sc_hd__clkinv_4.v
index 83fe8a1..2508bba 100644
--- a/cells/clkinv/sky130_fd_sc_hd__clkinv_4.v
+++ b/cells/clkinv/sky130_fd_sc_hd__clkinv_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinv/sky130_fd_sc_hd__clkinv_8.v b/cells/clkinv/sky130_fd_sc_hd__clkinv_8.v
index a898c5f..5183b57 100644
--- a/cells/clkinv/sky130_fd_sc_hd__clkinv_8.v
+++ b/cells/clkinv/sky130_fd_sc_hd__clkinv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_2.v b/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_2.v
index 9ab1abe..8b9a719 100644
--- a/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_2.v
+++ b/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinvlp_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_4.v b/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_4.v
index 6de32d9..f83c050 100644
--- a/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_4.v
+++ b/cells/clkinvlp/sky130_fd_sc_hd__clkinvlp_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__clkinvlp_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/conb/sky130_fd_sc_hd__conb_1.v b/cells/conb/sky130_fd_sc_hd__conb_1.v
index 6693051..bde841b 100644
--- a/cells/conb/sky130_fd_sc_hd__conb_1.v
+++ b/cells/conb/sky130_fd_sc_hd__conb_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__conb_1 (
-    HI  ,
-    LO  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    HI,
+    LO
 );
 
-    output HI  ;
-    output LO  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output HI;
+    output LO;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/decap/sky130_fd_sc_hd__decap_12.v b/cells/decap/sky130_fd_sc_hd__decap_12.v
index 98c6ba5..9d09ba0 100644
--- a/cells/decap/sky130_fd_sc_hd__decap_12.v
+++ b/cells/decap/sky130_fd_sc_hd__decap_12.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__decap_12 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__decap_12 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/decap/sky130_fd_sc_hd__decap_3.v b/cells/decap/sky130_fd_sc_hd__decap_3.v
index c760ebe..74ecffa 100644
--- a/cells/decap/sky130_fd_sc_hd__decap_3.v
+++ b/cells/decap/sky130_fd_sc_hd__decap_3.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__decap_3 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__decap_3 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/decap/sky130_fd_sc_hd__decap_4.v b/cells/decap/sky130_fd_sc_hd__decap_4.v
index 14560dd..6ed2110 100644
--- a/cells/decap/sky130_fd_sc_hd__decap_4.v
+++ b/cells/decap/sky130_fd_sc_hd__decap_4.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__decap_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__decap_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/decap/sky130_fd_sc_hd__decap_6.v b/cells/decap/sky130_fd_sc_hd__decap_6.v
index df227b6..041af93 100644
--- a/cells/decap/sky130_fd_sc_hd__decap_6.v
+++ b/cells/decap/sky130_fd_sc_hd__decap_6.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__decap_6 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__decap_6 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/decap/sky130_fd_sc_hd__decap_8.v b/cells/decap/sky130_fd_sc_hd__decap_8.v
index de8ac4c..559aa6f 100644
--- a/cells/decap/sky130_fd_sc_hd__decap_8.v
+++ b/cells/decap/sky130_fd_sc_hd__decap_8.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__decap_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__decap_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/dfbbn/sky130_fd_sc_hd__dfbbn_1.v b/cells/dfbbn/sky130_fd_sc_hd__dfbbn_1.v
index 539c12d..a656008 100644
--- a/cells/dfbbn/sky130_fd_sc_hd__dfbbn_1.v
+++ b/cells/dfbbn/sky130_fd_sc_hd__dfbbn_1.v

@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfbbn/sky130_fd_sc_hd__dfbbn_2.v b/cells/dfbbn/sky130_fd_sc_hd__dfbbn_2.v
index de2bc06..92d9a4c 100644
--- a/cells/dfbbn/sky130_fd_sc_hd__dfbbn_2.v
+++ b/cells/dfbbn/sky130_fd_sc_hd__dfbbn_2.v

@@ -87,11 +87,7 @@
     D      ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfbbp/sky130_fd_sc_hd__dfbbp_1.v b/cells/dfbbp/sky130_fd_sc_hd__dfbbp_1.v
index cc255f1..1cadeef 100644
--- a/cells/dfbbp/sky130_fd_sc_hd__dfbbp_1.v
+++ b/cells/dfbbp/sky130_fd_sc_hd__dfbbp_1.v

@@ -87,11 +87,7 @@
     D      ,
     CLK    ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  CLK    ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrbp/sky130_fd_sc_hd__dfrbp_1.v b/cells/dfrbp/sky130_fd_sc_hd__dfrbp_1.v
index c6c0458..c6ce89c 100644
--- a/cells/dfrbp/sky130_fd_sc_hd__dfrbp_1.v
+++ b/cells/dfrbp/sky130_fd_sc_hd__dfrbp_1.v

@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrbp/sky130_fd_sc_hd__dfrbp_2.v b/cells/dfrbp/sky130_fd_sc_hd__dfrbp_2.v
index 50ec5c4..4c8d4ae 100644
--- a/cells/dfrbp/sky130_fd_sc_hd__dfrbp_2.v
+++ b/cells/dfrbp/sky130_fd_sc_hd__dfrbp_2.v

@@ -82,11 +82,7 @@
     Q_N    ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -94,10 +90,6 @@
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtn/sky130_fd_sc_hd__dfrtn_1.v b/cells/dfrtn/sky130_fd_sc_hd__dfrtn_1.v
index 51de090..85901fe 100644
--- a/cells/dfrtn/sky130_fd_sc_hd__dfrtn_1.v
+++ b/cells/dfrtn/sky130_fd_sc_hd__dfrtn_1.v

@@ -79,21 +79,13 @@
     Q      ,
     CLK_N  ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK_N  ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_1.v b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_1.v
index 86968ee..5b24440 100644
--- a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_1.v
+++ b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_1.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_2.v b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_2.v
index 723fbf0..a5a02e1 100644
--- a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_2.v
+++ b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_2.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_4.v b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_4.v
index 562d624..2234a1b 100644
--- a/cells/dfrtp/sky130_fd_sc_hd__dfrtp_4.v
+++ b/cells/dfrtp/sky130_fd_sc_hd__dfrtp_4.v

@@ -78,21 +78,13 @@
     Q      ,
     CLK    ,
     D      ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
     input  CLK    ;
     input  D      ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfsbp/sky130_fd_sc_hd__dfsbp_1.v b/cells/dfsbp/sky130_fd_sc_hd__dfsbp_1.v
index 9a74bea..e4abee6 100644
--- a/cells/dfsbp/sky130_fd_sc_hd__dfsbp_1.v
+++ b/cells/dfsbp/sky130_fd_sc_hd__dfsbp_1.v

@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfsbp/sky130_fd_sc_hd__dfsbp_2.v b/cells/dfsbp/sky130_fd_sc_hd__dfsbp_2.v
index 5322d83..5135001 100644
--- a/cells/dfsbp/sky130_fd_sc_hd__dfsbp_2.v
+++ b/cells/dfsbp/sky130_fd_sc_hd__dfsbp_2.v

@@ -82,11 +82,7 @@
     Q_N  ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -94,10 +90,6 @@
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_hd__dfstp_1.v b/cells/dfstp/sky130_fd_sc_hd__dfstp_1.v
index 12b3fd7..0452550 100644
--- a/cells/dfstp/sky130_fd_sc_hd__dfstp_1.v
+++ b/cells/dfstp/sky130_fd_sc_hd__dfstp_1.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_hd__dfstp_2.v b/cells/dfstp/sky130_fd_sc_hd__dfstp_2.v
index babe261..a7c0644 100644
--- a/cells/dfstp/sky130_fd_sc_hd__dfstp_2.v
+++ b/cells/dfstp/sky130_fd_sc_hd__dfstp_2.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfstp/sky130_fd_sc_hd__dfstp_4.v b/cells/dfstp/sky130_fd_sc_hd__dfstp_4.v
index 0511e20..ed6926b 100644
--- a/cells/dfstp/sky130_fd_sc_hd__dfstp_4.v
+++ b/cells/dfstp/sky130_fd_sc_hd__dfstp_4.v

@@ -78,21 +78,13 @@
     Q    ,
     CLK  ,
     D    ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
     input  CLK  ;
     input  D    ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxbp/sky130_fd_sc_hd__dfxbp_1.v b/cells/dfxbp/sky130_fd_sc_hd__dfxbp_1.v
index 33269c0..b1746e7 100644
--- a/cells/dfxbp/sky130_fd_sc_hd__dfxbp_1.v
+++ b/cells/dfxbp/sky130_fd_sc_hd__dfxbp_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__dfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxbp/sky130_fd_sc_hd__dfxbp_2.v b/cells/dfxbp/sky130_fd_sc_hd__dfxbp_2.v
index 6cce744..86bc126 100644
--- a/cells/dfxbp/sky130_fd_sc_hd__dfxbp_2.v
+++ b/cells/dfxbp/sky130_fd_sc_hd__dfxbp_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__dfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_1.v b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_1.v
index a7a7280..3adc6d3 100644
--- a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_1.v
+++ b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__dfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_2.v b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_2.v
index a2d9deb..4fabb1a 100644
--- a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_2.v
+++ b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__dfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_4.v b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_4.v
index fb59386..2ad8d9f 100644
--- a/cells/dfxtp/sky130_fd_sc_hd__dfxtp_4.v
+++ b/cells/dfxtp/sky130_fd_sc_hd__dfxtp_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__dfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/diode/sky130_fd_sc_hd__diode_2.v b/cells/diode/sky130_fd_sc_hd__diode_2.v
index 5ce19f1..3be80f8 100644
--- a/cells/diode/sky130_fd_sc_hd__diode_2.v
+++ b/cells/diode/sky130_fd_sc_hd__diode_2.v

@@ -66,18 +66,10 @@
 
 `celldefine
 module sky130_fd_sc_hd__diode_2 (
-    DIODE,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    DIODE
 );
 
     input DIODE;
-    input VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_1.v b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_1.v
index 8081df2..9953515 100644
--- a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_1.v
+++ b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlclkp_1 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_2.v b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_2.v
index 22dd069..f4bb030 100644
--- a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_2.v
+++ b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlclkp_2 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_4.v b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_4.v
index c16b443..f33aeef 100644
--- a/cells/dlclkp/sky130_fd_sc_hd__dlclkp_4.v
+++ b/cells/dlclkp/sky130_fd_sc_hd__dlclkp_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlclkp_4 (
     GCLK,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbn/sky130_fd_sc_hd__dlrbn_1.v b/cells/dlrbn/sky130_fd_sc_hd__dlrbn_1.v
index 0c0509e..b4ac28c 100644
--- a/cells/dlrbn/sky130_fd_sc_hd__dlrbn_1.v
+++ b/cells/dlrbn/sky130_fd_sc_hd__dlrbn_1.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbn/sky130_fd_sc_hd__dlrbn_2.v b/cells/dlrbn/sky130_fd_sc_hd__dlrbn_2.v
index 77e971c..04e89a6 100644
--- a/cells/dlrbn/sky130_fd_sc_hd__dlrbn_2.v
+++ b/cells/dlrbn/sky130_fd_sc_hd__dlrbn_2.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbp/sky130_fd_sc_hd__dlrbp_1.v b/cells/dlrbp/sky130_fd_sc_hd__dlrbp_1.v
index ba79022..81e6160 100644
--- a/cells/dlrbp/sky130_fd_sc_hd__dlrbp_1.v
+++ b/cells/dlrbp/sky130_fd_sc_hd__dlrbp_1.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrbp/sky130_fd_sc_hd__dlrbp_2.v b/cells/dlrbp/sky130_fd_sc_hd__dlrbp_2.v
index f4e06ab..7f44a3a 100644
--- a/cells/dlrbp/sky130_fd_sc_hd__dlrbp_2.v
+++ b/cells/dlrbp/sky130_fd_sc_hd__dlrbp_2.v

@@ -83,11 +83,7 @@
     Q_N    ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
@@ -95,10 +91,6 @@
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_1.v b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_1.v
index 545de98..8077e1e 100644
--- a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_1.v
+++ b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_1.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_2.v b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_2.v
index b57fdff..9c3e848 100644
--- a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_2.v
+++ b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_2.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_4.v b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_4.v
index 952c0e7..bdf4192 100644
--- a/cells/dlrtn/sky130_fd_sc_hd__dlrtn_4.v
+++ b/cells/dlrtn/sky130_fd_sc_hd__dlrtn_4.v

@@ -78,21 +78,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE_N ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE_N
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE_N ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_1.v b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_1.v
index 0d23f21..1931234 100644
--- a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_1.v
+++ b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_1.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_2.v b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_2.v
index 6f5369a..d31e156 100644
--- a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_2.v
+++ b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_2.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_4.v b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_4.v
index e9d3b2b..58f897e 100644
--- a/cells/dlrtp/sky130_fd_sc_hd__dlrtp_4.v
+++ b/cells/dlrtp/sky130_fd_sc_hd__dlrtp_4.v

@@ -79,21 +79,13 @@
     Q      ,
     RESET_B,
     D      ,
-    GATE   ,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    GATE
 );
 
     output Q      ;
     input  RESET_B;
     input  D      ;
     input  GATE   ;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbn/sky130_fd_sc_hd__dlxbn_1.v b/cells/dlxbn/sky130_fd_sc_hd__dlxbn_1.v
index 39cbb7f..333d27d 100644
--- a/cells/dlxbn/sky130_fd_sc_hd__dlxbn_1.v
+++ b/cells/dlxbn/sky130_fd_sc_hd__dlxbn_1.v

@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbn/sky130_fd_sc_hd__dlxbn_2.v b/cells/dlxbn/sky130_fd_sc_hd__dlxbn_2.v
index 519e4d2..313b764 100644
--- a/cells/dlxbn/sky130_fd_sc_hd__dlxbn_2.v
+++ b/cells/dlxbn/sky130_fd_sc_hd__dlxbn_2.v

@@ -78,21 +78,13 @@
     Q     ,
     Q_N   ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     output Q_N   ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxbp/sky130_fd_sc_hd__dlxbp_1.v b/cells/dlxbp/sky130_fd_sc_hd__dlxbp_1.v
index 26a02be..ffe2c4f 100644
--- a/cells/dlxbp/sky130_fd_sc_hd__dlxbp_1.v
+++ b/cells/dlxbp/sky130_fd_sc_hd__dlxbp_1.v

@@ -78,21 +78,13 @@
     Q   ,
     Q_N ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     output Q_N ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_1.v b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_1.v
index f3e5007..b9d7467 100644
--- a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_1.v
+++ b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlxtn_1 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_2.v b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_2.v
index 320eaed..c25a20a 100644
--- a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_2.v
+++ b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlxtn_2 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_4.v b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_4.v
index 098f4a0..573b87d 100644
--- a/cells/dlxtn/sky130_fd_sc_hd__dlxtn_4.v
+++ b/cells/dlxtn/sky130_fd_sc_hd__dlxtn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlxtn_4 (
     Q     ,
     D     ,
-    GATE_N,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    GATE_N
 );
 
     output Q     ;
     input  D     ;
     input  GATE_N;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlxtp/sky130_fd_sc_hd__dlxtp_1.v b/cells/dlxtp/sky130_fd_sc_hd__dlxtp_1.v
index d6ac493..ff8ee8c 100644
--- a/cells/dlxtp/sky130_fd_sc_hd__dlxtp_1.v
+++ b/cells/dlxtp/sky130_fd_sc_hd__dlxtp_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__dlxtp_1 (
     Q   ,
     D   ,
-    GATE,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    GATE
 );
 
     output Q   ;
     input  D   ;
     input  GATE;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd1/sky130_fd_sc_hd__dlygate4sd1_1.v b/cells/dlygate4sd1/sky130_fd_sc_hd__dlygate4sd1_1.v
index b94f1e5..0cbc165 100644
--- a/cells/dlygate4sd1/sky130_fd_sc_hd__dlygate4sd1_1.v
+++ b/cells/dlygate4sd1/sky130_fd_sc_hd__dlygate4sd1_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlygate4sd1_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd2/sky130_fd_sc_hd__dlygate4sd2_1.v b/cells/dlygate4sd2/sky130_fd_sc_hd__dlygate4sd2_1.v
index 80d1861..961fa97 100644
--- a/cells/dlygate4sd2/sky130_fd_sc_hd__dlygate4sd2_1.v
+++ b/cells/dlygate4sd2/sky130_fd_sc_hd__dlygate4sd2_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlygate4sd2_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlygate4sd3/sky130_fd_sc_hd__dlygate4sd3_1.v b/cells/dlygate4sd3/sky130_fd_sc_hd__dlygate4sd3_1.v
index ff092d1..b0260ad 100644
--- a/cells/dlygate4sd3/sky130_fd_sc_hd__dlygate4sd3_1.v
+++ b/cells/dlygate4sd3/sky130_fd_sc_hd__dlygate4sd3_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlygate4sd3_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s2s/sky130_fd_sc_hd__dlymetal6s2s_1.v b/cells/dlymetal6s2s/sky130_fd_sc_hd__dlymetal6s2s_1.v
index 954270a..dbe8d23 100644
--- a/cells/dlymetal6s2s/sky130_fd_sc_hd__dlymetal6s2s_1.v
+++ b/cells/dlymetal6s2s/sky130_fd_sc_hd__dlymetal6s2s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlymetal6s2s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s4s/sky130_fd_sc_hd__dlymetal6s4s_1.v b/cells/dlymetal6s4s/sky130_fd_sc_hd__dlymetal6s4s_1.v
index 61a59c0..2fe29e5 100644
--- a/cells/dlymetal6s4s/sky130_fd_sc_hd__dlymetal6s4s_1.v
+++ b/cells/dlymetal6s4s/sky130_fd_sc_hd__dlymetal6s4s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlymetal6s4s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/dlymetal6s6s/sky130_fd_sc_hd__dlymetal6s6s_1.v b/cells/dlymetal6s6s/sky130_fd_sc_hd__dlymetal6s6s_1.v
index 55dcae4..de86f41 100644
--- a/cells/dlymetal6s6s/sky130_fd_sc_hd__dlymetal6s6s_1.v
+++ b/cells/dlymetal6s6s/sky130_fd_sc_hd__dlymetal6s6s_1.v

@@ -70,20 +70,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__dlymetal6s6s_1 (
-    X   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_hd__ebufn_1.v b/cells/ebufn/sky130_fd_sc_hd__ebufn_1.v
index 1b782fa..5d6b97f 100644
--- a/cells/ebufn/sky130_fd_sc_hd__ebufn_1.v
+++ b/cells/ebufn/sky130_fd_sc_hd__ebufn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__ebufn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_hd__ebufn_2.v b/cells/ebufn/sky130_fd_sc_hd__ebufn_2.v
index 099feb3..b934b18 100644
--- a/cells/ebufn/sky130_fd_sc_hd__ebufn_2.v
+++ b/cells/ebufn/sky130_fd_sc_hd__ebufn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__ebufn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_hd__ebufn_4.v b/cells/ebufn/sky130_fd_sc_hd__ebufn_4.v
index b557993..eab898e 100644
--- a/cells/ebufn/sky130_fd_sc_hd__ebufn_4.v
+++ b/cells/ebufn/sky130_fd_sc_hd__ebufn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__ebufn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ebufn/sky130_fd_sc_hd__ebufn_8.v b/cells/ebufn/sky130_fd_sc_hd__ebufn_8.v
index a386c35..6b69567 100644
--- a/cells/ebufn/sky130_fd_sc_hd__ebufn_8.v
+++ b/cells/ebufn/sky130_fd_sc_hd__ebufn_8.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__ebufn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/edfxbp/sky130_fd_sc_hd__edfxbp_1.v b/cells/edfxbp/sky130_fd_sc_hd__edfxbp_1.v
index fb3e3cc..26e3711 100644
--- a/cells/edfxbp/sky130_fd_sc_hd__edfxbp_1.v
+++ b/cells/edfxbp/sky130_fd_sc_hd__edfxbp_1.v

@@ -79,26 +79,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__edfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/edfxtp/sky130_fd_sc_hd__edfxtp_1.v b/cells/edfxtp/sky130_fd_sc_hd__edfxtp_1.v
index 0de4180..c21bf7e 100644
--- a/cells/edfxtp/sky130_fd_sc_hd__edfxtp_1.v
+++ b/cells/edfxtp/sky130_fd_sc_hd__edfxtp_1.v

@@ -76,24 +76,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__edfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_hd__einvn_0.v b/cells/einvn/sky130_fd_sc_hd__einvn_0.v
index 10e18f7..82d282d 100644
--- a/cells/einvn/sky130_fd_sc_hd__einvn_0.v
+++ b/cells/einvn/sky130_fd_sc_hd__einvn_0.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__einvn_0 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_hd__einvn_1.v b/cells/einvn/sky130_fd_sc_hd__einvn_1.v
index 5c5bfe7..1b7ebeb 100644
--- a/cells/einvn/sky130_fd_sc_hd__einvn_1.v
+++ b/cells/einvn/sky130_fd_sc_hd__einvn_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__einvn_1 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_hd__einvn_2.v b/cells/einvn/sky130_fd_sc_hd__einvn_2.v
index 48d9748..f9cf383 100644
--- a/cells/einvn/sky130_fd_sc_hd__einvn_2.v
+++ b/cells/einvn/sky130_fd_sc_hd__einvn_2.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__einvn_2 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_hd__einvn_4.v b/cells/einvn/sky130_fd_sc_hd__einvn_4.v
index 05c0c8f..b051c0f 100644
--- a/cells/einvn/sky130_fd_sc_hd__einvn_4.v
+++ b/cells/einvn/sky130_fd_sc_hd__einvn_4.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__einvn_4 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvn/sky130_fd_sc_hd__einvn_8.v b/cells/einvn/sky130_fd_sc_hd__einvn_8.v
index 3c02c7f..b5978f0 100644
--- a/cells/einvn/sky130_fd_sc_hd__einvn_8.v
+++ b/cells/einvn/sky130_fd_sc_hd__einvn_8.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__einvn_8 (
     Z   ,
     A   ,
-    TE_B,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    TE_B
 );
 
     output Z   ;
     input  A   ;
     input  TE_B;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_hd__einvp_1.v b/cells/einvp/sky130_fd_sc_hd__einvp_1.v
index c4772cc..7d0f7ea 100644
--- a/cells/einvp/sky130_fd_sc_hd__einvp_1.v
+++ b/cells/einvp/sky130_fd_sc_hd__einvp_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__einvp_1 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_hd__einvp_2.v b/cells/einvp/sky130_fd_sc_hd__einvp_2.v
index 5141bb6..9186175 100644
--- a/cells/einvp/sky130_fd_sc_hd__einvp_2.v
+++ b/cells/einvp/sky130_fd_sc_hd__einvp_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__einvp_2 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_hd__einvp_4.v b/cells/einvp/sky130_fd_sc_hd__einvp_4.v
index 0d9e602..249148d 100644
--- a/cells/einvp/sky130_fd_sc_hd__einvp_4.v
+++ b/cells/einvp/sky130_fd_sc_hd__einvp_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__einvp_4 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/einvp/sky130_fd_sc_hd__einvp_8.v b/cells/einvp/sky130_fd_sc_hd__einvp_8.v
index 8262b57..7f759e8 100644
--- a/cells/einvp/sky130_fd_sc_hd__einvp_8.v
+++ b/cells/einvp/sky130_fd_sc_hd__einvp_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__einvp_8 (
-    Z   ,
-    A   ,
-    TE  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Z ,
+    A ,
+    TE
 );
 
-    output Z   ;
-    input  A   ;
-    input  TE  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Z ;
+    input  A ;
+    input  TE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_hd__fa_1.v b/cells/fa/sky130_fd_sc_hd__fa_1.v
index 51c01e0..a2f55ba 100644
--- a/cells/fa/sky130_fd_sc_hd__fa_1.v
+++ b/cells/fa/sky130_fd_sc_hd__fa_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_hd__fa_2.v b/cells/fa/sky130_fd_sc_hd__fa_2.v
index e4b2e07..6897668 100644
--- a/cells/fa/sky130_fd_sc_hd__fa_2.v
+++ b/cells/fa/sky130_fd_sc_hd__fa_2.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fa/sky130_fd_sc_hd__fa_4.v b/cells/fa/sky130_fd_sc_hd__fa_4.v
index 8258f76..445ba26 100644
--- a/cells/fa/sky130_fd_sc_hd__fa_4.v
+++ b/cells/fa/sky130_fd_sc_hd__fa_4.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fah/sky130_fd_sc_hd__fah_1.v b/cells/fah/sky130_fd_sc_hd__fah_1.v
index 90f9a31..25c000e 100644
--- a/cells/fah/sky130_fd_sc_hd__fah_1.v
+++ b/cells/fah/sky130_fd_sc_hd__fah_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CI  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CI
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CI  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fahcin/sky130_fd_sc_hd__fahcin_1.v b/cells/fahcin/sky130_fd_sc_hd__fahcin_1.v
index dc6f283..2682ba2 100644
--- a/cells/fahcin/sky130_fd_sc_hd__fahcin_1.v
+++ b/cells/fahcin/sky130_fd_sc_hd__fahcin_1.v

@@ -82,11 +82,7 @@
     SUM ,
     A   ,
     B   ,
-    CIN ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CIN
 );
 
     output COUT;
@@ -94,10 +90,6 @@
     input  A   ;
     input  B   ;
     input  CIN ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fahcon/sky130_fd_sc_hd__fahcon_1.v b/cells/fahcon/sky130_fd_sc_hd__fahcon_1.v
index 9244ca2..fe16628 100644
--- a/cells/fahcon/sky130_fd_sc_hd__fahcon_1.v
+++ b/cells/fahcon/sky130_fd_sc_hd__fahcon_1.v

@@ -82,11 +82,7 @@
     SUM   ,
     A     ,
     B     ,
-    CI    ,
-    VPWR  ,
-    VGND  ,
-    VPB   ,
-    VNB
+    CI
 );
 
     output COUT_N;
@@ -94,10 +90,6 @@
     input  A     ;
     input  B     ;
     input  CI    ;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
-    input  VNB   ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/fill/sky130_fd_sc_hd__fill_1.v b/cells/fill/sky130_fd_sc_hd__fill_1.v
index 4da106e..c2c7fa0 100644
--- a/cells/fill/sky130_fd_sc_hd__fill_1.v
+++ b/cells/fill/sky130_fd_sc_hd__fill_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__fill_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__fill_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_hd__fill_2.v b/cells/fill/sky130_fd_sc_hd__fill_2.v
index 0fd1111..263a091 100644
--- a/cells/fill/sky130_fd_sc_hd__fill_2.v
+++ b/cells/fill/sky130_fd_sc_hd__fill_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__fill_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__fill_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_hd__fill_4.v b/cells/fill/sky130_fd_sc_hd__fill_4.v
index 914ee80..fa41eba 100644
--- a/cells/fill/sky130_fd_sc_hd__fill_4.v
+++ b/cells/fill/sky130_fd_sc_hd__fill_4.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__fill_4 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__fill_4 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/fill/sky130_fd_sc_hd__fill_8.v b/cells/fill/sky130_fd_sc_hd__fill_8.v
index 2e1e5f7..78cebc3 100644
--- a/cells/fill/sky130_fd_sc_hd__fill_8.v
+++ b/cells/fill/sky130_fd_sc_hd__fill_8.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__fill_8 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__fill_8 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/ha/sky130_fd_sc_hd__ha_1.v b/cells/ha/sky130_fd_sc_hd__ha_1.v
index dc0965e..96eea87 100644
--- a/cells/ha/sky130_fd_sc_hd__ha_1.v
+++ b/cells/ha/sky130_fd_sc_hd__ha_1.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ha/sky130_fd_sc_hd__ha_2.v b/cells/ha/sky130_fd_sc_hd__ha_2.v
index 95e3e01..73fdb7b 100644
--- a/cells/ha/sky130_fd_sc_hd__ha_2.v
+++ b/cells/ha/sky130_fd_sc_hd__ha_2.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/ha/sky130_fd_sc_hd__ha_4.v b/cells/ha/sky130_fd_sc_hd__ha_4.v
index 2970c38..45cb768 100644
--- a/cells/ha/sky130_fd_sc_hd__ha_4.v
+++ b/cells/ha/sky130_fd_sc_hd__ha_4.v

@@ -78,21 +78,13 @@
     COUT,
     SUM ,
     A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B
 );
 
     output COUT;
     output SUM ;
     input  A   ;
     input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_1.v b/cells/inv/sky130_fd_sc_hd__inv_1.v
index 7797dc6..70cd281 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_1.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_1.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_1 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_12.v b/cells/inv/sky130_fd_sc_hd__inv_12.v
index 631fce0..62502a0 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_12.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_12.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_12 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_16.v b/cells/inv/sky130_fd_sc_hd__inv_16.v
index 09dd9bf..90618a8 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_16.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_16.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_16 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_2.v b/cells/inv/sky130_fd_sc_hd__inv_2.v
index 99a9681..9a0488d 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_2.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_2.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_2 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_4.v b/cells/inv/sky130_fd_sc_hd__inv_4.v
index 9969fce..67dfc95 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_4.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_4.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_4 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_6.v b/cells/inv/sky130_fd_sc_hd__inv_6.v
index 45130c2..2869a59 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_6.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_6.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_6 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/inv/sky130_fd_sc_hd__inv_8.v b/cells/inv/sky130_fd_sc_hd__inv_8.v
index 33a3a06..89ae28b 100644
--- a/cells/inv/sky130_fd_sc_hd__inv_8.v
+++ b/cells/inv/sky130_fd_sc_hd__inv_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__inv_8 (
-    Y   ,
-    A   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A
 );
 
-    output Y   ;
-    input  A   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_bleeder/sky130_fd_sc_hd__lpflow_bleeder_1.v b/cells/lpflow_bleeder/sky130_fd_sc_hd__lpflow_bleeder_1.v
index 33baba7..ad35293 100644
--- a/cells/lpflow_bleeder/sky130_fd_sc_hd__lpflow_bleeder_1.v
+++ b/cells/lpflow_bleeder/sky130_fd_sc_hd__lpflow_bleeder_1.v

@@ -66,18 +66,10 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_bleeder_1 (
-    SHORT,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SHORT
 );
 
     input SHORT;
-    inout VPWR ;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
 
     // Voltage supply signals
     wire    VPWR;

diff --git a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_1.v b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_1.v
index 48d5b19..6c4ac4e 100644
--- a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_1.v
+++ b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_1.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkbufkapwr_1 (
-    X    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_16.v b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_16.v
index a02d01b..54ec736 100644
--- a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_16.v
+++ b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_16.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkbufkapwr_16 (
-    X    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_2.v b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_2.v
index cb649bb..1ee8493 100644
--- a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_2.v
+++ b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_2.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkbufkapwr_2 (
-    X    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_4.v b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_4.v
index 4ec65e1..18bfc9a 100644
--- a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_4.v
+++ b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_4.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkbufkapwr_4 (
-    X    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_8.v b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_8.v
index a056483..49c4af7 100644
--- a/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_8.v
+++ b/cells/lpflow_clkbufkapwr/sky130_fd_sc_hd__lpflow_clkbufkapwr_8.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkbufkapwr_8 (
-    X    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    X,
+    A
 );
 
-    output X    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_1.v b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_1.v
index 341877e..c87db3f 100644
--- a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_1.v
+++ b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_1.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkinvkapwr_1 (
-    Y    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_16.v b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_16.v
index ea04812..ad23bc3 100644
--- a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_16.v
+++ b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_16.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkinvkapwr_16 (
-    Y    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_2.v b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_2.v
index a83ba51..b51678e 100644
--- a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_2.v
+++ b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_2.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkinvkapwr_2 (
-    Y    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_4.v b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_4.v
index a1c07c7..a81f0ef 100644
--- a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_4.v
+++ b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_4.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkinvkapwr_4 (
-    Y    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_8.v b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_8.v
index cd5b742..2c1bde6 100644
--- a/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_8.v
+++ b/cells/lpflow_clkinvkapwr/sky130_fd_sc_hd__lpflow_clkinvkapwr_8.v

@@ -72,22 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_clkinvkapwr_8 (
-    Y    ,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    Y,
+    A
 );
 
-    output Y    ;
-    input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
+    output Y;
+    input  A;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_12.v b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_12.v
index c03f918..05d8b11 100644
--- a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_12.v
+++ b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_12.v

@@ -66,20 +66,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__lpflow_decapkapwr_12 (
-    VPWR ,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input VPWR ;
-    input KAPWR;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_hd__lpflow_decapkapwr_12 ();
     // Voltage supply signals
     supply1 VPWR ;
     supply1 KAPWR;

diff --git a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_3.v b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_3.v
index fcf3a05..a4ba462 100644
--- a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_3.v
+++ b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_3.v

@@ -67,20 +67,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__lpflow_decapkapwr_3 (
-    VPWR ,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input VPWR ;
-    input KAPWR;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_hd__lpflow_decapkapwr_3 ();
     // Voltage supply signals
     supply1 VPWR ;
     supply1 KAPWR;

diff --git a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_4.v b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_4.v
index 5061dad..a6270a9 100644
--- a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_4.v
+++ b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_4.v

@@ -66,20 +66,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__lpflow_decapkapwr_4 (
-    VPWR ,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input VPWR ;
-    input KAPWR;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_hd__lpflow_decapkapwr_4 ();
     // Voltage supply signals
     supply1 VPWR ;
     supply1 KAPWR;

diff --git a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_6.v b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_6.v
index 7eb7a89..b9e0afd 100644
--- a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_6.v
+++ b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_6.v

@@ -66,20 +66,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__lpflow_decapkapwr_6 (
-    VPWR ,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input VPWR ;
-    input KAPWR;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_hd__lpflow_decapkapwr_6 ();
     // Voltage supply signals
     supply1 VPWR ;
     supply1 KAPWR;

diff --git a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_8.v b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_8.v
index 081e632..a795591 100644
--- a/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_8.v
+++ b/cells/lpflow_decapkapwr/sky130_fd_sc_hd__lpflow_decapkapwr_8.v

@@ -66,20 +66,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__lpflow_decapkapwr_8 (
-    VPWR ,
-    KAPWR,
-    VGND ,
-    VPB  ,
-    VNB
-);
-
-    input VPWR ;
-    input KAPWR;
-    input VGND ;
-    input VPB  ;
-    input VNB  ;
-
+module sky130_fd_sc_hd__lpflow_decapkapwr_8 ();
     // Voltage supply signals
     supply1 VPWR ;
     supply1 KAPWR;

diff --git a/cells/lpflow_inputiso0n/sky130_fd_sc_hd__lpflow_inputiso0n_1.v b/cells/lpflow_inputiso0n/sky130_fd_sc_hd__lpflow_inputiso0n_1.v
index b70350f..db87698 100644
--- a/cells/lpflow_inputiso0n/sky130_fd_sc_hd__lpflow_inputiso0n_1.v
+++ b/cells/lpflow_inputiso0n/sky130_fd_sc_hd__lpflow_inputiso0n_1.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_inputiso0n_1 (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_inputiso0p/sky130_fd_sc_hd__lpflow_inputiso0p_1.v b/cells/lpflow_inputiso0p/sky130_fd_sc_hd__lpflow_inputiso0p_1.v
index 08320d3..e649734 100644
--- a/cells/lpflow_inputiso0p/sky130_fd_sc_hd__lpflow_inputiso0p_1.v
+++ b/cells/lpflow_inputiso0p/sky130_fd_sc_hd__lpflow_inputiso0p_1.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_inputiso0p_1 (
     X    ,
     A    ,
-    SLEEP,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_inputiso1n/sky130_fd_sc_hd__lpflow_inputiso1n_1.v b/cells/lpflow_inputiso1n/sky130_fd_sc_hd__lpflow_inputiso1n_1.v
index 2449af1..7632c9e 100644
--- a/cells/lpflow_inputiso1n/sky130_fd_sc_hd__lpflow_inputiso1n_1.v
+++ b/cells/lpflow_inputiso1n/sky130_fd_sc_hd__lpflow_inputiso1n_1.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_inputiso1n_1 (
     X      ,
     A      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output X      ;
     input  A      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_inputiso1p/sky130_fd_sc_hd__lpflow_inputiso1p_1.v b/cells/lpflow_inputiso1p/sky130_fd_sc_hd__lpflow_inputiso1p_1.v
index abbc6e4..af0cb78 100644
--- a/cells/lpflow_inputiso1p/sky130_fd_sc_hd__lpflow_inputiso1p_1.v
+++ b/cells/lpflow_inputiso1p/sky130_fd_sc_hd__lpflow_inputiso1p_1.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_inputiso1p_1 (
     X    ,
     A    ,
-    SLEEP,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SLEEP
 );
 
     output X    ;
     input  A    ;
     input  SLEEP;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch_1.v b/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch_1.v
index e5fc0ac..5b96030 100644
--- a/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch_1.v
+++ b/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch_1.v

@@ -74,20 +74,12 @@
 module sky130_fd_sc_hd__lpflow_inputisolatch_1 (
     Q      ,
     D      ,
-    SLEEP_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    SLEEP_B
 );
 
     output Q      ;
     input  D      ;
     input  SLEEP_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_1.v b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_1.v
index 7895442..7a9996a 100644
--- a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_1.v
+++ b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_1.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrc_1 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_16.v b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_16.v
index 7e1c1c3..35d871f 100644
--- a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_16.v
+++ b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_16.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrc_16 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_2.v b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_2.v
index 6a6d6ef..c4526ce 100644
--- a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_2.v
+++ b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_2.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrc_2 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_4.v b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_4.v
index 37b9f82..1f12b20 100644
--- a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_4.v
+++ b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_4.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrc_4 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_8.v b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_8.v
index 43908e6..60aa5c4 100644
--- a/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_8.v
+++ b/cells/lpflow_isobufsrc/sky130_fd_sc_hd__lpflow_isobufsrc_8.v

@@ -76,20 +76,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrc_8 (
     X    ,
     SLEEP,
-    A    ,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/lpflow_isobufsrckapwr/sky130_fd_sc_hd__lpflow_isobufsrckapwr_16.v b/cells/lpflow_isobufsrckapwr/sky130_fd_sc_hd__lpflow_isobufsrckapwr_16.v
index 9329b68..30bc9d9 100644
--- a/cells/lpflow_isobufsrckapwr/sky130_fd_sc_hd__lpflow_isobufsrckapwr_16.v
+++ b/cells/lpflow_isobufsrckapwr/sky130_fd_sc_hd__lpflow_isobufsrckapwr_16.v

@@ -80,22 +80,12 @@
 module sky130_fd_sc_hd__lpflow_isobufsrckapwr_16 (
     X    ,
     SLEEP,
-    A    ,
-    KAPWR,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    A
 );
 
     output X    ;
     input  SLEEP;
     input  A    ;
-    input  KAPWR;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 KAPWR;

diff --git a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1.v b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1.v
index 59c8352..4f77503 100644
--- a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1.v
+++ b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1.v

@@ -73,20 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 (
-    X     ,
-    A     ,
-    VPWRIN,
-    VPWR  ,
-    VGND  ,
-    VPB
+    X,
+    A
 );
 
-    output X     ;
-    input  A     ;
-    input  VPWRIN;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    VPWRIN;

diff --git a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2.v b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2.v
index 9be6052..93cb70b 100644
--- a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2.v
+++ b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2.v

@@ -73,20 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_2 (
-    X     ,
-    A     ,
-    VPWRIN,
-    VPWR  ,
-    VGND  ,
-    VPB
+    X,
+    A
 );
 
-    output X     ;
-    input  A     ;
-    input  VPWRIN;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    VPWRIN;

diff --git a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4.v b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4.v
index 5df3ed4..ad47d9d 100644
--- a/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4.v
+++ b/cells/lpflow_lsbuf_lh_hl_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4.v

@@ -73,20 +73,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_4 (
-    X     ,
-    A     ,
-    VPWRIN,
-    VPWR  ,
-    VGND  ,
-    VPB
+    X,
+    A
 );
 
-    output X     ;
-    input  A     ;
-    input  VPWRIN;
-    input  VPWR  ;
-    input  VGND  ;
-    input  VPB   ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    VPWRIN;

diff --git a/cells/lpflow_lsbuf_lh_isowell/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4.v b/cells/lpflow_lsbuf_lh_isowell/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4.v
index 0155566..d36cc33 100644
--- a/cells/lpflow_lsbuf_lh_isowell/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4.v
+++ b/cells/lpflow_lsbuf_lh_isowell/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4.v

@@ -74,22 +74,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_4 (
-    X       ,
-    A       ,
-    LOWLVPWR,
-    VPWR    ,
-    VGND    ,
-    VPB     ,
-    VNB
+    X,
+    A
 );
 
-    output X       ;
-    input  A       ;
-    input  LOWLVPWR;
-    input  VPWR    ;
-    input  VGND    ;
-    input  VPB     ;
-    input  VNB     ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    LOWLVPWR;

diff --git a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1.v b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1.v
index adc3081..0282cb2 100644
--- a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1.v
+++ b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1.v

@@ -72,20 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_1 (
-    X       ,
-    A       ,
-    LOWLVPWR,
-    VPWR    ,
-    VGND    ,
-    VPB
+    X,
+    A
 );
 
-    output X       ;
-    input  A       ;
-    input  LOWLVPWR;
-    input  VPWR    ;
-    input  VGND    ;
-    input  VPB     ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    LOWLVPWR;

diff --git a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2.v b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2.v
index 1c6aa7b..7a3ce60 100644
--- a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2.v
+++ b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2.v

@@ -72,20 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_2 (
-    X       ,
-    A       ,
-    LOWLVPWR,
-    VPWR    ,
-    VGND    ,
-    VPB
+    X,
+    A
 );
 
-    output X       ;
-    input  A       ;
-    input  LOWLVPWR;
-    input  VPWR    ;
-    input  VGND    ;
-    input  VPB     ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    LOWLVPWR;

diff --git a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4.v b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4.v
index f03b101..cb87d10 100644
--- a/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4.v
+++ b/cells/lpflow_lsbuf_lh_isowell_tap/sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4.v

@@ -72,20 +72,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__lpflow_lsbuf_lh_isowell_tap_4 (
-    X       ,
-    A       ,
-    LOWLVPWR,
-    VPWR    ,
-    VGND    ,
-    VPB
+    X,
+    A
 );
 
-    output X       ;
-    input  A       ;
-    input  LOWLVPWR;
-    input  VPWR    ;
-    input  VGND    ;
-    input  VPB     ;
+    output X;
+    input  A;
 
     // Voltage supply signals
     wire    LOWLVPWR;

diff --git a/cells/maj3/sky130_fd_sc_hd__maj3_1.v b/cells/maj3/sky130_fd_sc_hd__maj3_1.v
index d0770a6..cf5307f 100644
--- a/cells/maj3/sky130_fd_sc_hd__maj3_1.v
+++ b/cells/maj3/sky130_fd_sc_hd__maj3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__maj3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/maj3/sky130_fd_sc_hd__maj3_2.v b/cells/maj3/sky130_fd_sc_hd__maj3_2.v
index 3781483..009f9e8 100644
--- a/cells/maj3/sky130_fd_sc_hd__maj3_2.v
+++ b/cells/maj3/sky130_fd_sc_hd__maj3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__maj3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/maj3/sky130_fd_sc_hd__maj3_4.v b/cells/maj3/sky130_fd_sc_hd__maj3_4.v
index ae7ce05..ef97672 100644
--- a/cells/maj3/sky130_fd_sc_hd__maj3_4.v
+++ b/cells/maj3/sky130_fd_sc_hd__maj3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__maj3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_hd__mux2_1.v b/cells/mux2/sky130_fd_sc_hd__mux2_1.v
index 6dd99af..be23bf6 100644
--- a/cells/mux2/sky130_fd_sc_hd__mux2_1.v
+++ b/cells/mux2/sky130_fd_sc_hd__mux2_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_hd__mux2_2.v b/cells/mux2/sky130_fd_sc_hd__mux2_2.v
index 2f95039..55e0ff4 100644
--- a/cells/mux2/sky130_fd_sc_hd__mux2_2.v
+++ b/cells/mux2/sky130_fd_sc_hd__mux2_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_hd__mux2_4.v b/cells/mux2/sky130_fd_sc_hd__mux2_4.v
index 0322ea4..7435370 100644
--- a/cells/mux2/sky130_fd_sc_hd__mux2_4.v
+++ b/cells/mux2/sky130_fd_sc_hd__mux2_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2/sky130_fd_sc_hd__mux2_8.v b/cells/mux2/sky130_fd_sc_hd__mux2_8.v
index a9acaa9..dee981d 100644
--- a/cells/mux2/sky130_fd_sc_hd__mux2_8.v
+++ b/cells/mux2/sky130_fd_sc_hd__mux2_8.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2_8 (
-    X   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    S
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_hd__mux2i_1.v b/cells/mux2i/sky130_fd_sc_hd__mux2i_1.v
index 262662b..5221d61 100644
--- a/cells/mux2i/sky130_fd_sc_hd__mux2i_1.v
+++ b/cells/mux2i/sky130_fd_sc_hd__mux2i_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2i_1 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_hd__mux2i_2.v b/cells/mux2i/sky130_fd_sc_hd__mux2i_2.v
index f413635..04da015 100644
--- a/cells/mux2i/sky130_fd_sc_hd__mux2i_2.v
+++ b/cells/mux2i/sky130_fd_sc_hd__mux2i_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2i_2 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux2i/sky130_fd_sc_hd__mux2i_4.v b/cells/mux2i/sky130_fd_sc_hd__mux2i_4.v
index 96a2160..e9858ec 100644
--- a/cells/mux2i/sky130_fd_sc_hd__mux2i_4.v
+++ b/cells/mux2i/sky130_fd_sc_hd__mux2i_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux2i_4 (
-    Y   ,
-    A0  ,
-    A1  ,
-    S   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A0,
+    A1,
+    S
 );
 
-    output Y   ;
-    input  A0  ;
-    input  A1  ;
-    input  S   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A0;
+    input  A1;
+    input  S ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_hd__mux4_1.v b/cells/mux4/sky130_fd_sc_hd__mux4_1.v
index 9571e51..05ed5bc 100644
--- a/cells/mux4/sky130_fd_sc_hd__mux4_1.v
+++ b/cells/mux4/sky130_fd_sc_hd__mux4_1.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux4_1 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_hd__mux4_2.v b/cells/mux4/sky130_fd_sc_hd__mux4_2.v
index 4db561f..d28539f 100644
--- a/cells/mux4/sky130_fd_sc_hd__mux4_2.v
+++ b/cells/mux4/sky130_fd_sc_hd__mux4_2.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux4_2 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/mux4/sky130_fd_sc_hd__mux4_4.v b/cells/mux4/sky130_fd_sc_hd__mux4_4.v
index e1e5055..59a10f7 100644
--- a/cells/mux4/sky130_fd_sc_hd__mux4_4.v
+++ b/cells/mux4/sky130_fd_sc_hd__mux4_4.v

@@ -84,30 +84,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__mux4_4 (
-    X   ,
-    A0  ,
-    A1  ,
-    A2  ,
-    A3  ,
-    S0  ,
-    S1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A0,
+    A1,
+    A2,
+    A3,
+    S0,
+    S1
 );
 
-    output X   ;
-    input  A0  ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  S0  ;
-    input  S1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A0;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  S0;
+    input  S1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_hd__nand2_1.v b/cells/nand2/sky130_fd_sc_hd__nand2_1.v
index 634691a..8f01e60 100644
--- a/cells/nand2/sky130_fd_sc_hd__nand2_1.v
+++ b/cells/nand2/sky130_fd_sc_hd__nand2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_hd__nand2_2.v b/cells/nand2/sky130_fd_sc_hd__nand2_2.v
index 1d20414..1d4b41d 100644
--- a/cells/nand2/sky130_fd_sc_hd__nand2_2.v
+++ b/cells/nand2/sky130_fd_sc_hd__nand2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_hd__nand2_4.v b/cells/nand2/sky130_fd_sc_hd__nand2_4.v
index 4e15508..aab1b8d 100644
--- a/cells/nand2/sky130_fd_sc_hd__nand2_4.v
+++ b/cells/nand2/sky130_fd_sc_hd__nand2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2/sky130_fd_sc_hd__nand2_8.v b/cells/nand2/sky130_fd_sc_hd__nand2_8.v
index 1da3881..cb8a388 100644
--- a/cells/nand2/sky130_fd_sc_hd__nand2_8.v
+++ b/cells/nand2/sky130_fd_sc_hd__nand2_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_hd__nand2b_1.v b/cells/nand2b/sky130_fd_sc_hd__nand2b_1.v
index df56880..b848a2e 100644
--- a/cells/nand2b/sky130_fd_sc_hd__nand2b_1.v
+++ b/cells/nand2b/sky130_fd_sc_hd__nand2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_hd__nand2b_2.v b/cells/nand2b/sky130_fd_sc_hd__nand2b_2.v
index 9028391..26a0b9c 100644
--- a/cells/nand2b/sky130_fd_sc_hd__nand2b_2.v
+++ b/cells/nand2b/sky130_fd_sc_hd__nand2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand2b/sky130_fd_sc_hd__nand2b_4.v b/cells/nand2b/sky130_fd_sc_hd__nand2b_4.v
index d31120a..7e86944 100644
--- a/cells/nand2b/sky130_fd_sc_hd__nand2b_4.v
+++ b/cells/nand2b/sky130_fd_sc_hd__nand2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand2b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_hd__nand3_1.v b/cells/nand3/sky130_fd_sc_hd__nand3_1.v
index 8f2ce54..b407a01 100644
--- a/cells/nand3/sky130_fd_sc_hd__nand3_1.v
+++ b/cells/nand3/sky130_fd_sc_hd__nand3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_hd__nand3_2.v b/cells/nand3/sky130_fd_sc_hd__nand3_2.v
index 375919a..33ad7aa 100644
--- a/cells/nand3/sky130_fd_sc_hd__nand3_2.v
+++ b/cells/nand3/sky130_fd_sc_hd__nand3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3/sky130_fd_sc_hd__nand3_4.v b/cells/nand3/sky130_fd_sc_hd__nand3_4.v
index 3a0562e..e023866 100644
--- a/cells/nand3/sky130_fd_sc_hd__nand3_4.v
+++ b/cells/nand3/sky130_fd_sc_hd__nand3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_hd__nand3b_1.v b/cells/nand3b/sky130_fd_sc_hd__nand3b_1.v
index 9ebcbbb..4286b64 100644
--- a/cells/nand3b/sky130_fd_sc_hd__nand3b_1.v
+++ b/cells/nand3b/sky130_fd_sc_hd__nand3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_hd__nand3b_2.v b/cells/nand3b/sky130_fd_sc_hd__nand3b_2.v
index 7316de5..dda3cf6 100644
--- a/cells/nand3b/sky130_fd_sc_hd__nand3b_2.v
+++ b/cells/nand3b/sky130_fd_sc_hd__nand3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand3b/sky130_fd_sc_hd__nand3b_4.v b/cells/nand3b/sky130_fd_sc_hd__nand3b_4.v
index 7d15fee..a6a9368 100644
--- a/cells/nand3b/sky130_fd_sc_hd__nand3b_4.v
+++ b/cells/nand3b/sky130_fd_sc_hd__nand3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand3b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_hd__nand4_1.v b/cells/nand4/sky130_fd_sc_hd__nand4_1.v
index e251c06..2bd5e74 100644
--- a/cells/nand4/sky130_fd_sc_hd__nand4_1.v
+++ b/cells/nand4/sky130_fd_sc_hd__nand4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_hd__nand4_2.v b/cells/nand4/sky130_fd_sc_hd__nand4_2.v
index 5dd0366..8c284cb 100644
--- a/cells/nand4/sky130_fd_sc_hd__nand4_2.v
+++ b/cells/nand4/sky130_fd_sc_hd__nand4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4/sky130_fd_sc_hd__nand4_4.v b/cells/nand4/sky130_fd_sc_hd__nand4_4.v
index 04b001a..1087a09 100644
--- a/cells/nand4/sky130_fd_sc_hd__nand4_4.v
+++ b/cells/nand4/sky130_fd_sc_hd__nand4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_hd__nand4b_1.v b/cells/nand4b/sky130_fd_sc_hd__nand4b_1.v
index 94245d4..9926a52 100644
--- a/cells/nand4b/sky130_fd_sc_hd__nand4b_1.v
+++ b/cells/nand4b/sky130_fd_sc_hd__nand4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4b_1 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_hd__nand4b_2.v b/cells/nand4b/sky130_fd_sc_hd__nand4b_2.v
index f3e41b4..a36e268 100644
--- a/cells/nand4b/sky130_fd_sc_hd__nand4b_2.v
+++ b/cells/nand4b/sky130_fd_sc_hd__nand4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4b_2 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4b/sky130_fd_sc_hd__nand4b_4.v b/cells/nand4b/sky130_fd_sc_hd__nand4b_4.v
index dac4889..12d06ce 100644
--- a/cells/nand4b/sky130_fd_sc_hd__nand4b_4.v
+++ b/cells/nand4b/sky130_fd_sc_hd__nand4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4b_4 (
-    Y   ,
-    A_N ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B  ,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B  ;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_1.v b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_1.v
index ebcb0eb..a03f779 100644
--- a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_1.v
+++ b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4bb_1 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_2.v b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_2.v
index f8e6f60..6bc26a4 100644
--- a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_2.v
+++ b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4bb_2 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_4.v b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_4.v
index 9eb69b9..3f3a542 100644
--- a/cells/nand4bb/sky130_fd_sc_hd__nand4bb_4.v
+++ b/cells/nand4bb/sky130_fd_sc_hd__nand4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nand4bb_4 (
-    Y   ,
-    A_N ,
-    B_N ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A_N,
+    B_N,
+    C  ,
+    D
 );
 
-    output Y   ;
-    input  A_N ;
-    input  B_N ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A_N;
+    input  B_N;
+    input  C  ;
+    input  D  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_hd__nor2_1.v b/cells/nor2/sky130_fd_sc_hd__nor2_1.v
index 9e7da92..fcec599 100644
--- a/cells/nor2/sky130_fd_sc_hd__nor2_1.v
+++ b/cells/nor2/sky130_fd_sc_hd__nor2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_hd__nor2_2.v b/cells/nor2/sky130_fd_sc_hd__nor2_2.v
index 7b765f1..519b86e 100644
--- a/cells/nor2/sky130_fd_sc_hd__nor2_2.v
+++ b/cells/nor2/sky130_fd_sc_hd__nor2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_hd__nor2_4.v b/cells/nor2/sky130_fd_sc_hd__nor2_4.v
index af34e4c..ff81253 100644
--- a/cells/nor2/sky130_fd_sc_hd__nor2_4.v
+++ b/cells/nor2/sky130_fd_sc_hd__nor2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2/sky130_fd_sc_hd__nor2_8.v b/cells/nor2/sky130_fd_sc_hd__nor2_8.v
index 0628add..39c9de5 100644
--- a/cells/nor2/sky130_fd_sc_hd__nor2_8.v
+++ b/cells/nor2/sky130_fd_sc_hd__nor2_8.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2_8 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_hd__nor2b_1.v b/cells/nor2b/sky130_fd_sc_hd__nor2b_1.v
index e91866a..799d517 100644
--- a/cells/nor2b/sky130_fd_sc_hd__nor2b_1.v
+++ b/cells/nor2b/sky130_fd_sc_hd__nor2b_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2b_1 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_hd__nor2b_2.v b/cells/nor2b/sky130_fd_sc_hd__nor2b_2.v
index 2be6620..9c7efdb 100644
--- a/cells/nor2b/sky130_fd_sc_hd__nor2b_2.v
+++ b/cells/nor2b/sky130_fd_sc_hd__nor2b_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2b_2 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor2b/sky130_fd_sc_hd__nor2b_4.v b/cells/nor2b/sky130_fd_sc_hd__nor2b_4.v
index a771dfe..3aec1ac 100644
--- a/cells/nor2b/sky130_fd_sc_hd__nor2b_4.v
+++ b/cells/nor2b/sky130_fd_sc_hd__nor2b_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor2b_4 (
-    Y   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_hd__nor3_1.v b/cells/nor3/sky130_fd_sc_hd__nor3_1.v
index d30220d..45a630e 100644
--- a/cells/nor3/sky130_fd_sc_hd__nor3_1.v
+++ b/cells/nor3/sky130_fd_sc_hd__nor3_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_hd__nor3_2.v b/cells/nor3/sky130_fd_sc_hd__nor3_2.v
index 3c67cd6..4ee7846 100644
--- a/cells/nor3/sky130_fd_sc_hd__nor3_2.v
+++ b/cells/nor3/sky130_fd_sc_hd__nor3_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3/sky130_fd_sc_hd__nor3_4.v b/cells/nor3/sky130_fd_sc_hd__nor3_4.v
index 485eb44..f646edc 100644
--- a/cells/nor3/sky130_fd_sc_hd__nor3_4.v
+++ b/cells/nor3/sky130_fd_sc_hd__nor3_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_hd__nor3b_1.v b/cells/nor3b/sky130_fd_sc_hd__nor3b_1.v
index ae159d8..615adec 100644
--- a/cells/nor3b/sky130_fd_sc_hd__nor3b_1.v
+++ b/cells/nor3b/sky130_fd_sc_hd__nor3b_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_hd__nor3b_2.v b/cells/nor3b/sky130_fd_sc_hd__nor3b_2.v
index d8899ee..162de30 100644
--- a/cells/nor3b/sky130_fd_sc_hd__nor3b_2.v
+++ b/cells/nor3b/sky130_fd_sc_hd__nor3b_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor3b/sky130_fd_sc_hd__nor3b_4.v b/cells/nor3b/sky130_fd_sc_hd__nor3b_4.v
index a57a369..85464e6 100644
--- a/cells/nor3b/sky130_fd_sc_hd__nor3b_4.v
+++ b/cells/nor3b/sky130_fd_sc_hd__nor3b_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor3b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_hd__nor4_1.v b/cells/nor4/sky130_fd_sc_hd__nor4_1.v
index 626f1a6..e9eac76 100644
--- a/cells/nor4/sky130_fd_sc_hd__nor4_1.v
+++ b/cells/nor4/sky130_fd_sc_hd__nor4_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_hd__nor4_2.v b/cells/nor4/sky130_fd_sc_hd__nor4_2.v
index 8571e2c..4bef562 100644
--- a/cells/nor4/sky130_fd_sc_hd__nor4_2.v
+++ b/cells/nor4/sky130_fd_sc_hd__nor4_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4/sky130_fd_sc_hd__nor4_4.v b/cells/nor4/sky130_fd_sc_hd__nor4_4.v
index 9586593..9a97f92 100644
--- a/cells/nor4/sky130_fd_sc_hd__nor4_4.v
+++ b/cells/nor4/sky130_fd_sc_hd__nor4_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B,
+    C,
+    D
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_hd__nor4b_1.v b/cells/nor4b/sky130_fd_sc_hd__nor4b_1.v
index a7b15b3..4b698aa 100644
--- a/cells/nor4b/sky130_fd_sc_hd__nor4b_1.v
+++ b/cells/nor4b/sky130_fd_sc_hd__nor4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4b_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_hd__nor4b_2.v b/cells/nor4b/sky130_fd_sc_hd__nor4b_2.v
index a5a3d84..190ae18 100644
--- a/cells/nor4b/sky130_fd_sc_hd__nor4b_2.v
+++ b/cells/nor4b/sky130_fd_sc_hd__nor4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4b_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4b/sky130_fd_sc_hd__nor4b_4.v b/cells/nor4b/sky130_fd_sc_hd__nor4b_4.v
index 642d35d..5c679a2 100644
--- a/cells/nor4b/sky130_fd_sc_hd__nor4b_4.v
+++ b/cells/nor4b/sky130_fd_sc_hd__nor4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4b_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_1.v b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_1.v
index bfbbb76..0ad0a77 100644
--- a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_1.v
+++ b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4bb_1 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_2.v b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_2.v
index a0bd71f..75847b7 100644
--- a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_2.v
+++ b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4bb_2 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_4.v b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_4.v
index cb932fd..22b44fa 100644
--- a/cells/nor4bb/sky130_fd_sc_hd__nor4bb_4.v
+++ b/cells/nor4bb/sky130_fd_sc_hd__nor4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__nor4bb_4 (
-    Y   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_hd__o2111a_1.v b/cells/o2111a/sky130_fd_sc_hd__o2111a_1.v
index f7042f3..7123a06 100644
--- a/cells/o2111a/sky130_fd_sc_hd__o2111a_1.v
+++ b/cells/o2111a/sky130_fd_sc_hd__o2111a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_hd__o2111a_2.v b/cells/o2111a/sky130_fd_sc_hd__o2111a_2.v
index 78eb841..6d7376e 100644
--- a/cells/o2111a/sky130_fd_sc_hd__o2111a_2.v
+++ b/cells/o2111a/sky130_fd_sc_hd__o2111a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111a/sky130_fd_sc_hd__o2111a_4.v b/cells/o2111a/sky130_fd_sc_hd__o2111a_4.v
index 6fac910..a820142 100644
--- a/cells/o2111a/sky130_fd_sc_hd__o2111a_4.v
+++ b/cells/o2111a/sky130_fd_sc_hd__o2111a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_1.v b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_1.v
index 9a34f1e..81d9429 100644
--- a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_1.v
+++ b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_2.v b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_2.v
index 6734114..3fc709a 100644
--- a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_2.v
+++ b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_4.v b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_4.v
index ecb6dd1..6e8ff4f 100644
--- a/cells/o2111ai/sky130_fd_sc_hd__o2111ai_4.v
+++ b/cells/o2111ai/sky130_fd_sc_hd__o2111ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o2111ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    D1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1,
+    D1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  D1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
+    input  D1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_hd__o211a_1.v b/cells/o211a/sky130_fd_sc_hd__o211a_1.v
index 9127105..fcb29e1 100644
--- a/cells/o211a/sky130_fd_sc_hd__o211a_1.v
+++ b/cells/o211a/sky130_fd_sc_hd__o211a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_hd__o211a_2.v b/cells/o211a/sky130_fd_sc_hd__o211a_2.v
index c1751ce..1613db2 100644
--- a/cells/o211a/sky130_fd_sc_hd__o211a_2.v
+++ b/cells/o211a/sky130_fd_sc_hd__o211a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211a/sky130_fd_sc_hd__o211a_4.v b/cells/o211a/sky130_fd_sc_hd__o211a_4.v
index e9fbfe6..07cd02f 100644
--- a/cells/o211a/sky130_fd_sc_hd__o211a_4.v
+++ b/cells/o211a/sky130_fd_sc_hd__o211a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_hd__o211ai_1.v b/cells/o211ai/sky130_fd_sc_hd__o211ai_1.v
index 6e12085..1e084f0 100644
--- a/cells/o211ai/sky130_fd_sc_hd__o211ai_1.v
+++ b/cells/o211ai/sky130_fd_sc_hd__o211ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_hd__o211ai_2.v b/cells/o211ai/sky130_fd_sc_hd__o211ai_2.v
index 08f9cf9..0dcba60 100644
--- a/cells/o211ai/sky130_fd_sc_hd__o211ai_2.v
+++ b/cells/o211ai/sky130_fd_sc_hd__o211ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o211ai/sky130_fd_sc_hd__o211ai_4.v b/cells/o211ai/sky130_fd_sc_hd__o211ai_4.v
index 9072518..7cfe920 100644
--- a/cells/o211ai/sky130_fd_sc_hd__o211ai_4.v
+++ b/cells/o211ai/sky130_fd_sc_hd__o211ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o211ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_hd__o21a_1.v b/cells/o21a/sky130_fd_sc_hd__o21a_1.v
index a075f32..c4c8241 100644
--- a/cells/o21a/sky130_fd_sc_hd__o21a_1.v
+++ b/cells/o21a/sky130_fd_sc_hd__o21a_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_hd__o21a_2.v b/cells/o21a/sky130_fd_sc_hd__o21a_2.v
index 2febd5e..efc4aad 100644
--- a/cells/o21a/sky130_fd_sc_hd__o21a_2.v
+++ b/cells/o21a/sky130_fd_sc_hd__o21a_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21a/sky130_fd_sc_hd__o21a_4.v b/cells/o21a/sky130_fd_sc_hd__o21a_4.v
index 8480085..f9f13c0 100644
--- a/cells/o21a/sky130_fd_sc_hd__o21a_4.v
+++ b/cells/o21a/sky130_fd_sc_hd__o21a_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_hd__o21ai_0.v b/cells/o21ai/sky130_fd_sc_hd__o21ai_0.v
index 2637f50..7ce1d69 100644
--- a/cells/o21ai/sky130_fd_sc_hd__o21ai_0.v
+++ b/cells/o21ai/sky130_fd_sc_hd__o21ai_0.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21ai_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_hd__o21ai_1.v b/cells/o21ai/sky130_fd_sc_hd__o21ai_1.v
index 4b9f433..1c16258 100644
--- a/cells/o21ai/sky130_fd_sc_hd__o21ai_1.v
+++ b/cells/o21ai/sky130_fd_sc_hd__o21ai_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_hd__o21ai_2.v b/cells/o21ai/sky130_fd_sc_hd__o21ai_2.v
index 1a2af52..de66312 100644
--- a/cells/o21ai/sky130_fd_sc_hd__o21ai_2.v
+++ b/cells/o21ai/sky130_fd_sc_hd__o21ai_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ai/sky130_fd_sc_hd__o21ai_4.v b/cells/o21ai/sky130_fd_sc_hd__o21ai_4.v
index 9a051a3..2773ad2 100644
--- a/cells/o21ai/sky130_fd_sc_hd__o21ai_4.v
+++ b/cells/o21ai/sky130_fd_sc_hd__o21ai_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__o21ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_hd__o21ba_1.v b/cells/o21ba/sky130_fd_sc_hd__o21ba_1.v
index ee925a4..f088172 100644
--- a/cells/o21ba/sky130_fd_sc_hd__o21ba_1.v
+++ b/cells/o21ba/sky130_fd_sc_hd__o21ba_1.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_hd__o21ba_2.v b/cells/o21ba/sky130_fd_sc_hd__o21ba_2.v
index eb606e0..da96280 100644
--- a/cells/o21ba/sky130_fd_sc_hd__o21ba_2.v
+++ b/cells/o21ba/sky130_fd_sc_hd__o21ba_2.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21ba/sky130_fd_sc_hd__o21ba_4.v b/cells/o21ba/sky130_fd_sc_hd__o21ba_4.v
index b46093a..10698ac 100644
--- a/cells/o21ba/sky130_fd_sc_hd__o21ba_4.v
+++ b/cells/o21ba/sky130_fd_sc_hd__o21ba_4.v

@@ -81,21 +81,13 @@
     X   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output X   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_hd__o21bai_1.v b/cells/o21bai/sky130_fd_sc_hd__o21bai_1.v
index 7ffdab9..caceb27 100644
--- a/cells/o21bai/sky130_fd_sc_hd__o21bai_1.v
+++ b/cells/o21bai/sky130_fd_sc_hd__o21bai_1.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_hd__o21bai_2.v b/cells/o21bai/sky130_fd_sc_hd__o21bai_2.v
index 925e4f8..999a631 100644
--- a/cells/o21bai/sky130_fd_sc_hd__o21bai_2.v
+++ b/cells/o21bai/sky130_fd_sc_hd__o21bai_2.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o21bai/sky130_fd_sc_hd__o21bai_4.v b/cells/o21bai/sky130_fd_sc_hd__o21bai_4.v
index 6283ebb..086ca24 100644
--- a/cells/o21bai/sky130_fd_sc_hd__o21bai_4.v
+++ b/cells/o21bai/sky130_fd_sc_hd__o21bai_4.v

@@ -81,21 +81,13 @@
     Y   ,
     A1  ,
     A2  ,
-    B1_N,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B1_N
 );
 
     output Y   ;
     input  A1  ;
     input  A2  ;
     input  B1_N;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_hd__o221a_1.v b/cells/o221a/sky130_fd_sc_hd__o221a_1.v
index b9981bb..7ef58a8 100644
--- a/cells/o221a/sky130_fd_sc_hd__o221a_1.v
+++ b/cells/o221a/sky130_fd_sc_hd__o221a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_hd__o221a_2.v b/cells/o221a/sky130_fd_sc_hd__o221a_2.v
index 2b2a3fd..9ee7234 100644
--- a/cells/o221a/sky130_fd_sc_hd__o221a_2.v
+++ b/cells/o221a/sky130_fd_sc_hd__o221a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221a/sky130_fd_sc_hd__o221a_4.v b/cells/o221a/sky130_fd_sc_hd__o221a_4.v
index 55ecec6..9f948ce 100644
--- a/cells/o221a/sky130_fd_sc_hd__o221a_4.v
+++ b/cells/o221a/sky130_fd_sc_hd__o221a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_hd__o221ai_1.v b/cells/o221ai/sky130_fd_sc_hd__o221ai_1.v
index 819cd29..f5623e8 100644
--- a/cells/o221ai/sky130_fd_sc_hd__o221ai_1.v
+++ b/cells/o221ai/sky130_fd_sc_hd__o221ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_hd__o221ai_2.v b/cells/o221ai/sky130_fd_sc_hd__o221ai_2.v
index 144f9cf..f435dc9 100644
--- a/cells/o221ai/sky130_fd_sc_hd__o221ai_2.v
+++ b/cells/o221ai/sky130_fd_sc_hd__o221ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o221ai/sky130_fd_sc_hd__o221ai_4.v b/cells/o221ai/sky130_fd_sc_hd__o221ai_4.v
index 9631b6c..5bca34f 100644
--- a/cells/o221ai/sky130_fd_sc_hd__o221ai_4.v
+++ b/cells/o221ai/sky130_fd_sc_hd__o221ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o221ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_hd__o22a_1.v b/cells/o22a/sky130_fd_sc_hd__o22a_1.v
index ffbaed2..66a4a04 100644
--- a/cells/o22a/sky130_fd_sc_hd__o22a_1.v
+++ b/cells/o22a/sky130_fd_sc_hd__o22a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_hd__o22a_2.v b/cells/o22a/sky130_fd_sc_hd__o22a_2.v
index 7b26c68..14e5614 100644
--- a/cells/o22a/sky130_fd_sc_hd__o22a_2.v
+++ b/cells/o22a/sky130_fd_sc_hd__o22a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22a/sky130_fd_sc_hd__o22a_4.v b/cells/o22a/sky130_fd_sc_hd__o22a_4.v
index 0d7165f..5ccf0aa 100644
--- a/cells/o22a/sky130_fd_sc_hd__o22a_4.v
+++ b/cells/o22a/sky130_fd_sc_hd__o22a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_hd__o22ai_1.v b/cells/o22ai/sky130_fd_sc_hd__o22ai_1.v
index 932d227..04f3991 100644
--- a/cells/o22ai/sky130_fd_sc_hd__o22ai_1.v
+++ b/cells/o22ai/sky130_fd_sc_hd__o22ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_hd__o22ai_2.v b/cells/o22ai/sky130_fd_sc_hd__o22ai_2.v
index cf6f70f..4b74941 100644
--- a/cells/o22ai/sky130_fd_sc_hd__o22ai_2.v
+++ b/cells/o22ai/sky130_fd_sc_hd__o22ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o22ai/sky130_fd_sc_hd__o22ai_4.v b/cells/o22ai/sky130_fd_sc_hd__o22ai_4.v
index 4d1716d..abb2ee5 100644
--- a/cells/o22ai/sky130_fd_sc_hd__o22ai_4.v
+++ b/cells/o22ai/sky130_fd_sc_hd__o22ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o22ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_1.v b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_1.v
index ef8ad18..27bbb28 100644
--- a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_1.v
+++ b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_1.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_2.v b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_2.v
index 33d5c4b..76fc40d 100644
--- a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_2.v
+++ b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_2.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_4.v b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_4.v
index bbd8c6b..ac45b63 100644
--- a/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_4.v
+++ b/cells/o2bb2a/sky130_fd_sc_hd__o2bb2a_4.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output X   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_1.v b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_1.v
index c5418c7..90dd331 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_1.v
+++ b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_1.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_2.v b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_2.v
index befa003..e336f11 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_2.v
+++ b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_2.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_4.v b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_4.v
index 9654952..4c1f1ee 100644
--- a/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_4.v
+++ b/cells/o2bb2ai/sky130_fd_sc_hd__o2bb2ai_4.v

@@ -84,11 +84,7 @@
     A1_N,
     A2_N,
     B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    B2
 );
 
     output Y   ;
@@ -96,10 +92,6 @@
     input  A2_N;
     input  B1  ;
     input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_hd__o311a_1.v b/cells/o311a/sky130_fd_sc_hd__o311a_1.v
index 9f97600..c6fe251 100644
--- a/cells/o311a/sky130_fd_sc_hd__o311a_1.v
+++ b/cells/o311a/sky130_fd_sc_hd__o311a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_hd__o311a_2.v b/cells/o311a/sky130_fd_sc_hd__o311a_2.v
index 041cd87..951a76e 100644
--- a/cells/o311a/sky130_fd_sc_hd__o311a_2.v
+++ b/cells/o311a/sky130_fd_sc_hd__o311a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311a/sky130_fd_sc_hd__o311a_4.v b/cells/o311a/sky130_fd_sc_hd__o311a_4.v
index 6f81d8f..75d52d3 100644
--- a/cells/o311a/sky130_fd_sc_hd__o311a_4.v
+++ b/cells/o311a/sky130_fd_sc_hd__o311a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_hd__o311ai_0.v b/cells/o311ai/sky130_fd_sc_hd__o311ai_0.v
index acfab85..95ffd34 100644
--- a/cells/o311ai/sky130_fd_sc_hd__o311ai_0.v
+++ b/cells/o311ai/sky130_fd_sc_hd__o311ai_0.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311ai_0 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_hd__o311ai_1.v b/cells/o311ai/sky130_fd_sc_hd__o311ai_1.v
index 43dc62f..11c40fa 100644
--- a/cells/o311ai/sky130_fd_sc_hd__o311ai_1.v
+++ b/cells/o311ai/sky130_fd_sc_hd__o311ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_hd__o311ai_2.v b/cells/o311ai/sky130_fd_sc_hd__o311ai_2.v
index 615e4ad..ce7f0ee 100644
--- a/cells/o311ai/sky130_fd_sc_hd__o311ai_2.v
+++ b/cells/o311ai/sky130_fd_sc_hd__o311ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o311ai/sky130_fd_sc_hd__o311ai_4.v b/cells/o311ai/sky130_fd_sc_hd__o311ai_4.v
index a154331..b21cf3e 100644
--- a/cells/o311ai/sky130_fd_sc_hd__o311ai_4.v
+++ b/cells/o311ai/sky130_fd_sc_hd__o311ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o311ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    C1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    C1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  C1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  C1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_hd__o31a_1.v b/cells/o31a/sky130_fd_sc_hd__o31a_1.v
index 7b467dd..e148468 100644
--- a/cells/o31a/sky130_fd_sc_hd__o31a_1.v
+++ b/cells/o31a/sky130_fd_sc_hd__o31a_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_hd__o31a_2.v b/cells/o31a/sky130_fd_sc_hd__o31a_2.v
index 8ecfee8..c7a3852 100644
--- a/cells/o31a/sky130_fd_sc_hd__o31a_2.v
+++ b/cells/o31a/sky130_fd_sc_hd__o31a_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31a/sky130_fd_sc_hd__o31a_4.v b/cells/o31a/sky130_fd_sc_hd__o31a_4.v
index 5a58e72..88ee600 100644
--- a/cells/o31a/sky130_fd_sc_hd__o31a_4.v
+++ b/cells/o31a/sky130_fd_sc_hd__o31a_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_hd__o31ai_1.v b/cells/o31ai/sky130_fd_sc_hd__o31ai_1.v
index 1167798..d565bf0 100644
--- a/cells/o31ai/sky130_fd_sc_hd__o31ai_1.v
+++ b/cells/o31ai/sky130_fd_sc_hd__o31ai_1.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_hd__o31ai_2.v b/cells/o31ai/sky130_fd_sc_hd__o31ai_2.v
index ca1c56f..97c919e 100644
--- a/cells/o31ai/sky130_fd_sc_hd__o31ai_2.v
+++ b/cells/o31ai/sky130_fd_sc_hd__o31ai_2.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o31ai/sky130_fd_sc_hd__o31ai_4.v b/cells/o31ai/sky130_fd_sc_hd__o31ai_4.v
index f7e6b5a..71679c6 100644
--- a/cells/o31ai/sky130_fd_sc_hd__o31ai_4.v
+++ b/cells/o31ai/sky130_fd_sc_hd__o31ai_4.v

@@ -80,26 +80,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__o31ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_hd__o32a_1.v b/cells/o32a/sky130_fd_sc_hd__o32a_1.v
index 5e820ad..484b131 100644
--- a/cells/o32a/sky130_fd_sc_hd__o32a_1.v
+++ b/cells/o32a/sky130_fd_sc_hd__o32a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_hd__o32a_2.v b/cells/o32a/sky130_fd_sc_hd__o32a_2.v
index 425557f..6ff10b4 100644
--- a/cells/o32a/sky130_fd_sc_hd__o32a_2.v
+++ b/cells/o32a/sky130_fd_sc_hd__o32a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32a/sky130_fd_sc_hd__o32a_4.v b/cells/o32a/sky130_fd_sc_hd__o32a_4.v
index f153265..58633c1 100644
--- a/cells/o32a/sky130_fd_sc_hd__o32a_4.v
+++ b/cells/o32a/sky130_fd_sc_hd__o32a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_hd__o32ai_1.v b/cells/o32ai/sky130_fd_sc_hd__o32ai_1.v
index ac4c2fe..4d4e57d 100644
--- a/cells/o32ai/sky130_fd_sc_hd__o32ai_1.v
+++ b/cells/o32ai/sky130_fd_sc_hd__o32ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_hd__o32ai_2.v b/cells/o32ai/sky130_fd_sc_hd__o32ai_2.v
index 59083cd..7a11682 100644
--- a/cells/o32ai/sky130_fd_sc_hd__o32ai_2.v
+++ b/cells/o32ai/sky130_fd_sc_hd__o32ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o32ai/sky130_fd_sc_hd__o32ai_4.v b/cells/o32ai/sky130_fd_sc_hd__o32ai_4.v
index 7ef391a..bc627e6 100644
--- a/cells/o32ai/sky130_fd_sc_hd__o32ai_4.v
+++ b/cells/o32ai/sky130_fd_sc_hd__o32ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o32ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    B1  ,
-    B2  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    B1,
+    B2
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  B1  ;
-    input  B2  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  B1;
+    input  B2;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_hd__o41a_1.v b/cells/o41a/sky130_fd_sc_hd__o41a_1.v
index 57d9df0..271877a 100644
--- a/cells/o41a/sky130_fd_sc_hd__o41a_1.v
+++ b/cells/o41a/sky130_fd_sc_hd__o41a_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41a_1 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_hd__o41a_2.v b/cells/o41a/sky130_fd_sc_hd__o41a_2.v
index b295709..8ea090e 100644
--- a/cells/o41a/sky130_fd_sc_hd__o41a_2.v
+++ b/cells/o41a/sky130_fd_sc_hd__o41a_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41a_2 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41a/sky130_fd_sc_hd__o41a_4.v b/cells/o41a/sky130_fd_sc_hd__o41a_4.v
index 5651630..3d6b617 100644
--- a/cells/o41a/sky130_fd_sc_hd__o41a_4.v
+++ b/cells/o41a/sky130_fd_sc_hd__o41a_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41a_4 (
-    X   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output X   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_hd__o41ai_1.v b/cells/o41ai/sky130_fd_sc_hd__o41ai_1.v
index 49ad013..2651232 100644
--- a/cells/o41ai/sky130_fd_sc_hd__o41ai_1.v
+++ b/cells/o41ai/sky130_fd_sc_hd__o41ai_1.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41ai_1 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_hd__o41ai_2.v b/cells/o41ai/sky130_fd_sc_hd__o41ai_2.v
index 0af25ab..4b73c9e 100644
--- a/cells/o41ai/sky130_fd_sc_hd__o41ai_2.v
+++ b/cells/o41ai/sky130_fd_sc_hd__o41ai_2.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41ai_2 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/o41ai/sky130_fd_sc_hd__o41ai_4.v b/cells/o41ai/sky130_fd_sc_hd__o41ai_4.v
index c75c8f5..bdc2f51 100644
--- a/cells/o41ai/sky130_fd_sc_hd__o41ai_4.v
+++ b/cells/o41ai/sky130_fd_sc_hd__o41ai_4.v

@@ -83,28 +83,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__o41ai_4 (
-    Y   ,
-    A1  ,
-    A2  ,
-    A3  ,
-    A4  ,
-    B1  ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y ,
+    A1,
+    A2,
+    A3,
+    A4,
+    B1
 );
 
-    output Y   ;
-    input  A1  ;
-    input  A2  ;
-    input  A3  ;
-    input  A4  ;
-    input  B1  ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y ;
+    input  A1;
+    input  A2;
+    input  A3;
+    input  A4;
+    input  B1;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_hd__or2_0.v b/cells/or2/sky130_fd_sc_hd__or2_0.v
index edb40c7..d83df42 100644
--- a/cells/or2/sky130_fd_sc_hd__or2_0.v
+++ b/cells/or2/sky130_fd_sc_hd__or2_0.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2_0 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_hd__or2_1.v b/cells/or2/sky130_fd_sc_hd__or2_1.v
index 452b373..336ce8c 100644
--- a/cells/or2/sky130_fd_sc_hd__or2_1.v
+++ b/cells/or2/sky130_fd_sc_hd__or2_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_hd__or2_2.v b/cells/or2/sky130_fd_sc_hd__or2_2.v
index 96dd802..1836481 100644
--- a/cells/or2/sky130_fd_sc_hd__or2_2.v
+++ b/cells/or2/sky130_fd_sc_hd__or2_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2/sky130_fd_sc_hd__or2_4.v b/cells/or2/sky130_fd_sc_hd__or2_4.v
index a3cf4d6..ef9d227 100644
--- a/cells/or2/sky130_fd_sc_hd__or2_4.v
+++ b/cells/or2/sky130_fd_sc_hd__or2_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_hd__or2b_1.v b/cells/or2b/sky130_fd_sc_hd__or2b_1.v
index aa7d175..2307c57 100644
--- a/cells/or2b/sky130_fd_sc_hd__or2b_1.v
+++ b/cells/or2b/sky130_fd_sc_hd__or2b_1.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2b_1 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_hd__or2b_2.v b/cells/or2b/sky130_fd_sc_hd__or2b_2.v
index d37bbbc..1488ef8 100644
--- a/cells/or2b/sky130_fd_sc_hd__or2b_2.v
+++ b/cells/or2b/sky130_fd_sc_hd__or2b_2.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2b_2 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or2b/sky130_fd_sc_hd__or2b_4.v b/cells/or2b/sky130_fd_sc_hd__or2b_4.v
index 4ffa8d3..b1ce5e4 100644
--- a/cells/or2b/sky130_fd_sc_hd__or2b_4.v
+++ b/cells/or2b/sky130_fd_sc_hd__or2b_4.v

@@ -72,22 +72,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__or2b_4 (
-    X   ,
-    A   ,
-    B_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_hd__or3_1.v b/cells/or3/sky130_fd_sc_hd__or3_1.v
index 29fe6c0..273aa05 100644
--- a/cells/or3/sky130_fd_sc_hd__or3_1.v
+++ b/cells/or3/sky130_fd_sc_hd__or3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_hd__or3_2.v b/cells/or3/sky130_fd_sc_hd__or3_2.v
index 5605fd8..2f9f68f 100644
--- a/cells/or3/sky130_fd_sc_hd__or3_2.v
+++ b/cells/or3/sky130_fd_sc_hd__or3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3/sky130_fd_sc_hd__or3_4.v b/cells/or3/sky130_fd_sc_hd__or3_4.v
index a9ea6ae..9ebb271 100644
--- a/cells/or3/sky130_fd_sc_hd__or3_4.v
+++ b/cells/or3/sky130_fd_sc_hd__or3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_hd__or3b_1.v b/cells/or3b/sky130_fd_sc_hd__or3b_1.v
index 2205f37..048f19e 100644
--- a/cells/or3b/sky130_fd_sc_hd__or3b_1.v
+++ b/cells/or3b/sky130_fd_sc_hd__or3b_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3b_1 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_hd__or3b_2.v b/cells/or3b/sky130_fd_sc_hd__or3b_2.v
index d482985..bfc9422 100644
--- a/cells/or3b/sky130_fd_sc_hd__or3b_2.v
+++ b/cells/or3b/sky130_fd_sc_hd__or3b_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3b_2 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or3b/sky130_fd_sc_hd__or3b_4.v b/cells/or3b/sky130_fd_sc_hd__or3b_4.v
index 84ecf8c..e3ad4bc 100644
--- a/cells/or3b/sky130_fd_sc_hd__or3b_4.v
+++ b/cells/or3b/sky130_fd_sc_hd__or3b_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__or3b_4 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_hd__or4_1.v b/cells/or4/sky130_fd_sc_hd__or4_1.v
index 0549d82..1cb2184 100644
--- a/cells/or4/sky130_fd_sc_hd__or4_1.v
+++ b/cells/or4/sky130_fd_sc_hd__or4_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_hd__or4_2.v b/cells/or4/sky130_fd_sc_hd__or4_2.v
index 4d03f54..6ec3e10 100644
--- a/cells/or4/sky130_fd_sc_hd__or4_2.v
+++ b/cells/or4/sky130_fd_sc_hd__or4_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4/sky130_fd_sc_hd__or4_4.v b/cells/or4/sky130_fd_sc_hd__or4_4.v
index 9d437e7..d4b836b 100644
--- a/cells/or4/sky130_fd_sc_hd__or4_4.v
+++ b/cells/or4/sky130_fd_sc_hd__or4_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C,
+    D
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
+    input  D;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_hd__or4b_1.v b/cells/or4b/sky130_fd_sc_hd__or4b_1.v
index fbb8a2c..d33df56 100644
--- a/cells/or4b/sky130_fd_sc_hd__or4b_1.v
+++ b/cells/or4b/sky130_fd_sc_hd__or4b_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4b_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_hd__or4b_2.v b/cells/or4b/sky130_fd_sc_hd__or4b_2.v
index 35c46f8..03794e7 100644
--- a/cells/or4b/sky130_fd_sc_hd__or4b_2.v
+++ b/cells/or4b/sky130_fd_sc_hd__or4b_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4b_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4b/sky130_fd_sc_hd__or4b_4.v b/cells/or4b/sky130_fd_sc_hd__or4b_4.v
index c38b46d..304ba7e 100644
--- a/cells/or4b/sky130_fd_sc_hd__or4b_4.v
+++ b/cells/or4b/sky130_fd_sc_hd__or4b_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4b_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C  ,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C  ;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_hd__or4bb_1.v b/cells/or4bb/sky130_fd_sc_hd__or4bb_1.v
index b4f6cf9..80da14f 100644
--- a/cells/or4bb/sky130_fd_sc_hd__or4bb_1.v
+++ b/cells/or4bb/sky130_fd_sc_hd__or4bb_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4bb_1 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_hd__or4bb_2.v b/cells/or4bb/sky130_fd_sc_hd__or4bb_2.v
index 0d5c2c6..6cb3d8c 100644
--- a/cells/or4bb/sky130_fd_sc_hd__or4bb_2.v
+++ b/cells/or4bb/sky130_fd_sc_hd__or4bb_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4bb_2 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/or4bb/sky130_fd_sc_hd__or4bb_4.v b/cells/or4bb/sky130_fd_sc_hd__or4bb_4.v
index 503a651..8f8898c 100644
--- a/cells/or4bb/sky130_fd_sc_hd__or4bb_4.v
+++ b/cells/or4bb/sky130_fd_sc_hd__or4bb_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__or4bb_4 (
-    X   ,
-    A   ,
-    B   ,
-    C_N ,
-    D_N ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X  ,
+    A  ,
+    B  ,
+    C_N,
+    D_N
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C_N ;
-    input  D_N ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X  ;
+    input  A  ;
+    input  B  ;
+    input  C_N;
+    input  D_N;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/probe_p/sky130_fd_sc_hd__probe_p_8.v b/cells/probe_p/sky130_fd_sc_hd__probe_p_8.v
index e479bef..f46f076 100644
--- a/cells/probe_p/sky130_fd_sc_hd__probe_p_8.v
+++ b/cells/probe_p/sky130_fd_sc_hd__probe_p_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__probe_p_8 (
-    X   ,
-    A   ,
-    VGND,
-    VNB ,
-    VPB ,
-    VPWR
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VGND;
-    input  VNB ;
-    input  VPB ;
-    input  VPWR;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply0 VGND;

diff --git a/cells/probec_p/sky130_fd_sc_hd__probec_p_8.v b/cells/probec_p/sky130_fd_sc_hd__probec_p_8.v
index 27bbde7..e9cb538 100644
--- a/cells/probec_p/sky130_fd_sc_hd__probec_p_8.v
+++ b/cells/probec_p/sky130_fd_sc_hd__probec_p_8.v

@@ -69,20 +69,12 @@
 
 `celldefine
 module sky130_fd_sc_hd__probec_p_8 (
-    X   ,
-    A   ,
-    VGND,
-    VNB ,
-    VPB ,
-    VPWR
+    X,
+    A
 );
 
-    output X   ;
-    input  A   ;
-    input  VGND;
-    input  VNB ;
-    input  VPB ;
-    input  VPWR;
+    output X;
+    input  A;
 
     // Voltage supply signals
     supply0 VGND;

diff --git a/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_1.v b/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_1.v
index 48c728c..bd80f3f 100644
--- a/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_1.v
+++ b/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_1.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_2.v b/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_2.v
index d59873e..f4d3efe 100644
--- a/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_2.v
+++ b/cells/sdfbbn/sky130_fd_sc_hd__sdfbbn_2.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK_N  ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK_N  ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfbbp/sky130_fd_sc_hd__sdfbbp_1.v b/cells/sdfbbp/sky130_fd_sc_hd__sdfbbp_1.v
index 87ef73d..abf1ed1 100644
--- a/cells/sdfbbp/sky130_fd_sc_hd__sdfbbp_1.v
+++ b/cells/sdfbbp/sky130_fd_sc_hd__sdfbbp_1.v

@@ -95,11 +95,7 @@
     SCE    ,
     CLK    ,
     SET_B  ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -110,10 +106,6 @@
     input  CLK    ;
     input  SET_B  ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_1.v b/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_1.v
index adc1e38..6c6a248 100644
--- a/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_1.v
+++ b/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_1.v

@@ -91,11 +91,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -105,10 +101,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_2.v b/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_2.v
index 6e0bc01..b9a8517 100644
--- a/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_2.v
+++ b/cells/sdfrbp/sky130_fd_sc_hd__sdfrbp_2.v

@@ -91,11 +91,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -105,10 +101,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtn/sky130_fd_sc_hd__sdfrtn_1.v b/cells/sdfrtn/sky130_fd_sc_hd__sdfrtn_1.v
index 9746c74..12e6d3d 100644
--- a/cells/sdfrtn/sky130_fd_sc_hd__sdfrtn_1.v
+++ b/cells/sdfrtn/sky130_fd_sc_hd__sdfrtn_1.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_1.v b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_1.v
index f9e0763..f4e714f 100644
--- a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_1.v
+++ b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_1.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_2.v b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_2.v
index 62be756..14899ef 100644
--- a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_2.v
+++ b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_2.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_4.v b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_4.v
index da592f2..01ce5b5 100644
--- a/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_4.v
+++ b/cells/sdfrtp/sky130_fd_sc_hd__sdfrtp_4.v

@@ -87,11 +87,7 @@
     D      ,
     SCD    ,
     SCE    ,
-    RESET_B,
-    VPWR   ,
-    VGND   ,
-    VPB    ,
-    VNB
+    RESET_B
 );
 
     output Q      ;
@@ -100,10 +96,6 @@
     input  SCD    ;
     input  SCE    ;
     input  RESET_B;
-    input  VPWR   ;
-    input  VGND   ;
-    input  VPB    ;
-    input  VNB    ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_1.v b/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_1.v
index 56e82af..b9e7013 100644
--- a/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_1.v
+++ b/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_1.v

@@ -91,11 +91,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -105,10 +101,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_2.v b/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_2.v
index 2278152..83aa941 100644
--- a/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_2.v
+++ b/cells/sdfsbp/sky130_fd_sc_hd__sdfsbp_2.v

@@ -91,11 +91,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -105,10 +101,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_1.v b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_1.v
index bf909d1..5c7b879 100644
--- a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_1.v
+++ b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_1.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_2.v b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_2.v
index 9d7063d..b0598cf 100644
--- a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_2.v
+++ b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_2.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_4.v b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_4.v
index 25352be..94e382b 100644
--- a/cells/sdfstp/sky130_fd_sc_hd__sdfstp_4.v
+++ b/cells/sdfstp/sky130_fd_sc_hd__sdfstp_4.v

@@ -87,11 +87,7 @@
     D    ,
     SCD  ,
     SCE  ,
-    SET_B,
-    VPWR ,
-    VGND ,
-    VPB  ,
-    VNB
+    SET_B
 );
 
     output Q    ;
@@ -100,10 +96,6 @@
     input  SCD  ;
     input  SCE  ;
     input  SET_B;
-    input  VPWR ;
-    input  VGND ;
-    input  VPB  ;
-    input  VNB  ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_1.v b/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_1.v
index ee93485..54ee76e 100644
--- a/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_1.v
+++ b/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_1.v

@@ -81,28 +81,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__sdfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_2.v b/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_2.v
index c811f11..b201dd4 100644
--- a/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_2.v
+++ b/cells/sdfxbp/sky130_fd_sc_hd__sdfxbp_2.v

@@ -81,28 +81,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__sdfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_1.v b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_1.v
index b265008..fdc4e89 100644
--- a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_1.v
+++ b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_1.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__sdfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_2.v b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_2.v
index d521518..c752473 100644
--- a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_2.v
+++ b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_2.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__sdfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_4.v b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_4.v
index 6b05226..c15ef34 100644
--- a/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_4.v
+++ b/cells/sdfxtp/sky130_fd_sc_hd__sdfxtp_4.v

@@ -78,26 +78,18 @@
 
 `celldefine
 module sky130_fd_sc_hd__sdfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_1.v b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_1.v
index ae9c167..7b2ccd8 100644
--- a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_1.v
+++ b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_1.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_2.v b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_2.v
index ace19ce..756bfd0 100644
--- a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_2.v
+++ b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_2.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_4.v b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_4.v
index 22dd911..bcd0118 100644
--- a/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_4.v
+++ b/cells/sdlclkp/sky130_fd_sc_hd__sdlclkp_4.v

@@ -78,21 +78,13 @@
     GCLK,
     SCE ,
     GATE,
-    CLK ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    CLK
 );
 
     output GCLK;
     input  SCE ;
     input  GATE;
     input  CLK ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_1.v b/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_1.v
index 3f97d88..8f342d1 100644
--- a/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_1.v
+++ b/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_1.v

@@ -85,30 +85,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__sedfxbp_1 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_2.v b/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_2.v
index 36d39a5..181d73e 100644
--- a/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_2.v
+++ b/cells/sedfxbp/sky130_fd_sc_hd__sedfxbp_2.v

@@ -85,30 +85,22 @@
 
 `celldefine
 module sky130_fd_sc_hd__sedfxbp_2 (
-    Q   ,
-    Q_N ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    Q_N,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    output Q_N ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    output Q_N;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_1.v b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_1.v
index 480b41a..b942f0b 100644
--- a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_1.v
+++ b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_1.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__sedfxtp_1 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_2.v b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_2.v
index 39188ec..911e87b 100644
--- a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_2.v
+++ b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_2.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__sedfxtp_2 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_4.v b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_4.v
index fe856f9..6ceb91f 100644
--- a/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_4.v
+++ b/cells/sedfxtp/sky130_fd_sc_hd__sedfxtp_4.v

@@ -82,28 +82,20 @@
 
 `celldefine
 module sky130_fd_sc_hd__sedfxtp_4 (
-    Q   ,
-    CLK ,
-    D   ,
-    DE  ,
-    SCD ,
-    SCE ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Q  ,
+    CLK,
+    D  ,
+    DE ,
+    SCD,
+    SCE
 );
 
-    output Q   ;
-    input  CLK ;
-    input  D   ;
-    input  DE  ;
-    input  SCD ;
-    input  SCE ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Q  ;
+    input  CLK;
+    input  D  ;
+    input  DE ;
+    input  SCD;
+    input  SCE;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/tap/sky130_fd_sc_hd__tap_1.v b/cells/tap/sky130_fd_sc_hd__tap_1.v
index 63c9631..22fca9f 100644
--- a/cells/tap/sky130_fd_sc_hd__tap_1.v
+++ b/cells/tap/sky130_fd_sc_hd__tap_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__tap_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__tap_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tap/sky130_fd_sc_hd__tap_2.v b/cells/tap/sky130_fd_sc_hd__tap_2.v
index ce8d820..383f124 100644
--- a/cells/tap/sky130_fd_sc_hd__tap_2.v
+++ b/cells/tap/sky130_fd_sc_hd__tap_2.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__tap_2 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__tap_2 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvgnd/sky130_fd_sc_hd__tapvgnd_1.v b/cells/tapvgnd/sky130_fd_sc_hd__tapvgnd_1.v
index 1ad04be..0e180c7 100644
--- a/cells/tapvgnd/sky130_fd_sc_hd__tapvgnd_1.v
+++ b/cells/tapvgnd/sky130_fd_sc_hd__tapvgnd_1.v

@@ -63,18 +63,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__tapvgnd_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__tapvgnd_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvgnd2/sky130_fd_sc_hd__tapvgnd2_1.v b/cells/tapvgnd2/sky130_fd_sc_hd__tapvgnd2_1.v
index bd0fbce..389652e 100644
--- a/cells/tapvgnd2/sky130_fd_sc_hd__tapvgnd2_1.v
+++ b/cells/tapvgnd2/sky130_fd_sc_hd__tapvgnd2_1.v

@@ -63,18 +63,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__tapvgnd2_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__tapvgnd2_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/tapvpwrvgnd/sky130_fd_sc_hd__tapvpwrvgnd_1.v b/cells/tapvpwrvgnd/sky130_fd_sc_hd__tapvpwrvgnd_1.v
index 30b697e..3154932 100644
--- a/cells/tapvpwrvgnd/sky130_fd_sc_hd__tapvpwrvgnd_1.v
+++ b/cells/tapvpwrvgnd/sky130_fd_sc_hd__tapvpwrvgnd_1.v

@@ -62,18 +62,7 @@
 /*********************************************************/
 
 `celldefine
-module sky130_fd_sc_hd__tapvpwrvgnd_1 (
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
-);
-
-    input VPWR;
-    input VGND;
-    input VPB ;
-    input VNB ;
-
+module sky130_fd_sc_hd__tapvpwrvgnd_1 ();
     // Voltage supply signals
     supply1 VPWR;
     supply0 VGND;

diff --git a/cells/xnor2/sky130_fd_sc_hd__xnor2_1.v b/cells/xnor2/sky130_fd_sc_hd__xnor2_1.v
index 98d228c..2e034c7 100644
--- a/cells/xnor2/sky130_fd_sc_hd__xnor2_1.v
+++ b/cells/xnor2/sky130_fd_sc_hd__xnor2_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor2_1 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor2/sky130_fd_sc_hd__xnor2_2.v b/cells/xnor2/sky130_fd_sc_hd__xnor2_2.v
index 0f7ed6d..381640e 100644
--- a/cells/xnor2/sky130_fd_sc_hd__xnor2_2.v
+++ b/cells/xnor2/sky130_fd_sc_hd__xnor2_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor2_2 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor2/sky130_fd_sc_hd__xnor2_4.v b/cells/xnor2/sky130_fd_sc_hd__xnor2_4.v
index 3eab0d0..8115306 100644
--- a/cells/xnor2/sky130_fd_sc_hd__xnor2_4.v
+++ b/cells/xnor2/sky130_fd_sc_hd__xnor2_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor2_4 (
-    Y   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    Y,
+    A,
+    B
 );
 
-    output Y   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output Y;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_hd__xnor3_1.v b/cells/xnor3/sky130_fd_sc_hd__xnor3_1.v
index ef91a2e..edf7c70 100644
--- a/cells/xnor3/sky130_fd_sc_hd__xnor3_1.v
+++ b/cells/xnor3/sky130_fd_sc_hd__xnor3_1.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_hd__xnor3_2.v b/cells/xnor3/sky130_fd_sc_hd__xnor3_2.v
index c09a496..a61afcc 100644
--- a/cells/xnor3/sky130_fd_sc_hd__xnor3_2.v
+++ b/cells/xnor3/sky130_fd_sc_hd__xnor3_2.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xnor3/sky130_fd_sc_hd__xnor3_4.v b/cells/xnor3/sky130_fd_sc_hd__xnor3_4.v
index 81a649f..cbd9d15 100644
--- a/cells/xnor3/sky130_fd_sc_hd__xnor3_4.v
+++ b/cells/xnor3/sky130_fd_sc_hd__xnor3_4.v

@@ -75,24 +75,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xnor3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_hd__xor2_1.v b/cells/xor2/sky130_fd_sc_hd__xor2_1.v
index 19e7bd7..7918392 100644
--- a/cells/xor2/sky130_fd_sc_hd__xor2_1.v
+++ b/cells/xor2/sky130_fd_sc_hd__xor2_1.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor2_1 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_hd__xor2_2.v b/cells/xor2/sky130_fd_sc_hd__xor2_2.v
index a98a18b..84bea34 100644
--- a/cells/xor2/sky130_fd_sc_hd__xor2_2.v
+++ b/cells/xor2/sky130_fd_sc_hd__xor2_2.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor2_2 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor2/sky130_fd_sc_hd__xor2_4.v b/cells/xor2/sky130_fd_sc_hd__xor2_4.v
index 8bdca68..4d0f65d 100644
--- a/cells/xor2/sky130_fd_sc_hd__xor2_4.v
+++ b/cells/xor2/sky130_fd_sc_hd__xor2_4.v

@@ -74,22 +74,14 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor2_4 (
-    X   ,
-    A   ,
-    B   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_hd__xor3_1.v b/cells/xor3/sky130_fd_sc_hd__xor3_1.v
index a5646f1..267be6d 100644
--- a/cells/xor3/sky130_fd_sc_hd__xor3_1.v
+++ b/cells/xor3/sky130_fd_sc_hd__xor3_1.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor3_1 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_hd__xor3_2.v b/cells/xor3/sky130_fd_sc_hd__xor3_2.v
index 2a47bcf..b48ce16 100644
--- a/cells/xor3/sky130_fd_sc_hd__xor3_2.v
+++ b/cells/xor3/sky130_fd_sc_hd__xor3_2.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor3_2 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;

diff --git a/cells/xor3/sky130_fd_sc_hd__xor3_4.v b/cells/xor3/sky130_fd_sc_hd__xor3_4.v
index 8c37780..88cbf83 100644
--- a/cells/xor3/sky130_fd_sc_hd__xor3_4.v
+++ b/cells/xor3/sky130_fd_sc_hd__xor3_4.v

@@ -77,24 +77,16 @@
 
 `celldefine
 module sky130_fd_sc_hd__xor3_4 (
-    X   ,
-    A   ,
-    B   ,
-    C   ,
-    VPWR,
-    VGND,
-    VPB ,
-    VNB
+    X,
+    A,
+    B,
+    C
 );
 
-    output X   ;
-    input  A   ;
-    input  B   ;
-    input  C   ;
-    input  VPWR;
-    input  VGND;
-    input  VPB ;
-    input  VNB ;
+    output X;
+    input  A;
+    input  B;
+    input  C;
 
     // Voltage supply signals
     supply1 VPWR;