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| 2.1 |
| ], |
| "comp_attribute,output_voltage_range": [ |
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| ], |
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| "driver_waveform_rise": "ramp", |
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| "leakage_power": [ |
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| { |
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| ], |
| "level_shifter_type": "LH", |
| "pg_pin,LOWLVPWR": { |
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| "voltage_name": "LOWLVPWR" |
| }, |
| "pg_pin,VGND": { |
| "pg_type": "primary_ground", |
| "related_bias_pin": "VPB", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin,VPB": { |
| "pg_type": "pwell", |
| "physical_connection": "device_layer", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin,VPWR": { |
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| "related_bias_pin": "VNB", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| "level_shifter_data_pin": "true", |
| "max_transition": 5.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "LOWLVPWR", |
| "rise_capacitance": 0.004943 |
| }, |
| "pin,X": { |
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| "function": "(A)", |
| "internal_power": { |
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| "power_down_function": "(!LOWLVPWR+!VPWR+VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": { |
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| } |
| } |
| } |
