| { |
| "area": 8.7584, |
| "cell_footprint": "or3b", |
| "cell_leakage_power": 7.850062e-05, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "leakage_power": [ |
| { |
| "value": 0.0003005, |
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| }, |
| { |
| "value": 5.9399175e-05, |
| "when": "!A&!B&!C_N" |
| }, |
| { |
| "value": 3.1198358e-05, |
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| }, |
| { |
| "value": 5.729503e-05, |
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| }, |
| { |
| "value": 3.4143271e-05, |
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| }, |
| { |
| "value": 5.7387099e-05, |
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| }, |
| { |
| "value": 3.0809214e-05, |
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| }, |
| { |
| "value": 5.7286559e-05, |
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| } |
| ], |
| "pg_pin VGND": { |
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| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
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| "pg_pin VPB": { |
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| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
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| "voltage_name": "VPWR" |
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| "clock": "false", |
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| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
| 3.16228, |
| 9.9999999 |
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| "rise_power power_inputs_1": { |
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| "related_power_pin": "VPWR", |
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| }, |
| "pin B": { |
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| "clock": "false", |
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| "internal_power": { |
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| 0.316228, |
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| }, |
| "max_transition": 10.0, |
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| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001417 |
| }, |
| "pin C_N": { |
| "capacitance": 0.00127, |
| "clock": "false", |
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| "fall_capacitance": 0.001207, |
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| 0.004263 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.316228, |
| 1.0, |
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| 0.0007411, |
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| 0.0005773 |
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| } |
| }, |
| "max_transition": 10.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.001334 |
| }, |
| "pin X": { |
| "direction": "output", |
| "function": "(A) | (B) | (!C_N)", |
| "internal_power": [ |
| { |
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| "related_pin": "A", |
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| { |
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| }, |
| "related_pin": "B", |
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| { |
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| }, |
| "related_pin": "C_N", |
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| ], |
| "max_capacitance": 0.526438, |
| "max_transition": 9.995444, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
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