{
  "area": 5.0048,
  "cell_footprint": "o21ai",
  "cell_leakage_power": 0.3793545,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "leakage_power": [
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      "value": 0.0266393,
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    },
    {
      "value": 0.0064365,
      "when": "!A1&!A2&!B1"
    },
    {
      "value": 1.0730019,
      "when": "!A1&A2&B1"
    },
    {
      "value": 0.0147815,
      "when": "!A1&A2&!B1"
    },
    {
      "value": 1.1376585,
      "when": "A1&!A2&B1"
    },
    {
      "value": 0.0147816,
      "when": "A1&!A2&!B1"
    },
    {
      "value": 0.746755,
      "when": "A1&A2&B1"
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    {
      "value": 0.0147816,
      "when": "A1&A2&!B1"
    }
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  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
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    "clock": "false",
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          0.650743,
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      "rise_power power_inputs_1": {
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    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
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  "pin A2": {
    "capacitance": 0.001745,
    "clock": "false",
    "direction": "input",
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    "internal_power": {
      "fall_power power_inputs_1": {
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        "values": [
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      "rise_power power_inputs_1": {
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    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.00185
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  "pin B1": {
    "capacitance": 0.001699,
    "clock": "false",
    "direction": "input",
    "fall_capacitance": 0.00167,
    "internal_power": {
      "fall_power power_inputs_1": {
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        "values": [
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      "rise_power power_inputs_1": {
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    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
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  "pin Y": {
    "direction": "output",
    "function": "(!A1&!A2) | (!B1)",
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        "fall_power power_outputs_1": {
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      {
        "fall_power power_outputs_1": {
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      {
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    "max_capacitance": 0.050364,
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    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
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        "cell_rise del_1_7_7": {
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        "rise_transition del_1_7_7": {
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