| { |
| "area": 20.0192, |
| "cell_footprint": "nand3b", |
| "cell_leakage_power": 0.00564911, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "leakage_power": [ |
| { |
| "value": 0.0002316, |
| "when": "!A_N&!B&C" |
| }, |
| { |
| "value": 0.0218579, |
| "when": "!A_N&!B&!C" |
| }, |
| { |
| "value": 0.00055, |
| "when": "!A_N&B&C" |
| }, |
| { |
| "value": 0.00036, |
| "when": "!A_N&B&!C" |
| }, |
| { |
| "value": 0.0110163, |
| "when": "A_N&!B&C" |
| }, |
| { |
| "value": 0.0110163, |
| "when": "A_N&!B&!C" |
| }, |
| { |
| "value": 9.5750488e-05, |
| "when": "A_N&B&C" |
| }, |
| { |
| "value": 6.5039947e-05, |
| "when": "A_N&B&!C" |
| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
| "pin A_N": { |
| "capacitance": 0.002004, |
| "clock": "false", |
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| "fall_capacitance": 0.001911, |
| "internal_power": { |
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| "index_1": [ |
| 0.01, |
| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
| 3.16228, |
| 9.9999999 |
| ], |
| "values": [ |
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| 0.0077387, |
| 0.0064851, |
| 0.0065429, |
| 0.0067258, |
| 0.0073043, |
| 0.009134 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
| 3.16228, |
| 9.9999999 |
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| 0.0088445, |
| 0.0087401, |
| 0.0084099 |
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| }, |
| "max_transition": 10.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002096 |
| }, |
| "pin B": { |
| "capacitance": 0.007325, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.007096, |
| "internal_power": { |
| "fall_power power_inputs_1": { |
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| 0.01, |
| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
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| 9.9999999 |
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| 0.0081528, |
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| 0.0082982, |
| 0.0086476 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.1, |
| 0.316228, |
| 1.0, |
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| -0.0078895, |
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| } |
| }, |
| "max_transition": 10.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.007553 |
| }, |
| "pin C": { |
| "capacitance": 0.007527, |
| "clock": "false", |
| "direction": "input", |
| "fall_capacitance": 0.007226, |
| "internal_power": { |
| "fall_power power_inputs_1": { |
| "index_1": [ |
| 0.01, |
| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
| 3.16228, |
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| 0.0078928, |
| 0.0078919, |
| 0.0078889, |
| 0.0078799 |
| ] |
| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0316228, |
| 0.1, |
| 0.316228, |
| 1.0, |
| 3.16228, |
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| ], |
| "values": [ |
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| -0.0078803, |
| -0.007867 |
| ] |
| } |
| }, |
| "max_transition": 10.0, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.007827 |
| }, |
| "pin Y": { |
| "direction": "output", |
| "function": "(A_N) | (!B) | (!C)", |
| "internal_power": [ |
| { |
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| 0.3162278, |
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| "values": [ |
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| [ |
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| -0.0429924, |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "A_N", |
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| 0.01, |
| 0.03162278, |
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| 0.3162278, |
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| 0.06372774, |
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| ], |
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| [ |
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| 0.1992355, |
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| ] |
| } |
| }, |
| { |
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| [ |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "B", |
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| [ |
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| [ |
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| 0.2006112, |
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| }, |
| { |
| "fall_power power_outputs_1": { |
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| 0.01, |
| 0.03162278, |
| 0.1, |
| 0.3162278, |
| 1, |
| 3.162278, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| ] |
| }, |
| "related_pin": "C", |
| "rise_power power_outputs_1": { |
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| 0.1, |
| 0.3162278, |
| 1, |
| 3.162278, |
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| } |
| ], |
| "max_capacitance": 0.719462, |
| "max_transition": 10.008191, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
| "cell_fall del_1_7_7": { |
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