{
  "area": 21.2704,
  "cell_footprint": "dlrbp",
  "cell_leakage_power": 11.5721,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "latch IQ,IQ_N": {
    "clear": "!RESET_B",
    "data_in": "D",
    "enable": "GATE"
  },
  "leakage_power": [
    {
      "value": 12.8297541,
      "when": "RESET_B&D&GATE&Q&!Q_N"
    },
    {
      "value": 10.6053868,
      "when": "RESET_B&!D&!GATE&!Q&Q_N"
    },
    {
      "value": 9.7896438,
      "when": "!RESET_B&!D&GATE&!Q&Q_N"
    },
    {
      "value": 10.1864863,
      "when": "RESET_B&!D&GATE&!Q&Q_N"
    },
    {
      "value": 12.7478454,
      "when": "RESET_B&D&!GATE&Q&!Q_N"
    },
    {
      "value": 11.5343664,
      "when": "!RESET_B&D&GATE&!Q&Q_N"
    },
    {
      "value": 12.9781466,
      "when": "!RESET_B&D&!GATE&!Q&Q_N"
    },
    {
      "value": 10.2084989,
      "when": "!RESET_B&!D&!GATE&!Q&Q_N"
    },
    {
      "value": 13.3750628,
      "when": "RESET_B&D&!GATE&!Q&Q_N"
    },
    {
      "value": 11.465854,
      "when": "RESET_B&!D&!GATE&Q&!Q_N"
    }
  ],
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
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    "capacitance": 0.001587,
    "clock": "false",
    "direction": "input",
    "fall_capacitance": 0.001545,
    "internal_power": {
      "fall_power power_inputs_1": {
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          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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          0.0045046,
          0.0044229,
          0.0043909,
          0.0045154
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      },
      "rise_power power_inputs_1": {
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          0.0316228,
          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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        "values": [
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          0.0012327,
          0.0011462,
          0.0010606,
          0.0009771,
          0.0009006
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    },
    "max_transition": 10.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001628,
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      {
        "fall_constraint vio_3_3_1": {
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            5.0,
            9.9999999
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          "index_2": [
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            5.0,
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              0.7517152
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              -2.1686055,
              -0.7568705,
              -0.03279
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        },
        "related_pin": "GATE",
        "rise_constraint vio_3_3_1": {
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          "index_2": [
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          "values": [
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            [
              0.1851136,
              1.3386699,
              2.0188049
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            [
              0.2264141,
              1.2261618,
              1.8660136
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_falling",
        "violation_delay_degrade_pct": 10
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      {
        "fall_constraint vio_3_3_1": {
          "index_1": [
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            9.9999999
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          "index_2": [
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            9.9999999
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          "values": [
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              -0.0822285,
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            [
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              0.0111553,
              -0.7257425
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            [
              2.2293681,
              0.7974916,
              0.0660869
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        },
        "related_pin": "GATE",
        "rise_constraint vio_3_3_1": {
          "index_1": [
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            5.0,
            9.9999999
          ],
          "index_2": [
            0.01,
            5.0,
            9.9999999
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          "values": [
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              -0.635207,
              -1.9169372,
              -2.6282003
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            [
              0.1045309,
              -1.1570576,
              -1.8719827
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            [
              0.4276104,
              -0.8358093,
              -1.5507344
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_falling",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "pin GATE": {
    "capacitance": 0.001596,
    "clock": "true",
    "direction": "input",
    "fall_capacitance": 0.001514,
    "internal_power": {
      "fall_power power_inputs_1": {
        "index_1": [
          0.01,
          0.0316228,
          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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        "values": [
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          0.0096851,
          0.0096022,
          0.0095383,
          0.0095335,
          0.0097163
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      },
      "rise_power power_inputs_1": {
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          0.0316228,
          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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        "values": [
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          0.0056903,
          0.005579,
          0.0054344,
          0.0051849
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      }
    },
    "max_transition": 10.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001678,
    "timing": {
      "related_output_pin": "Q",
      "related_pin": "GATE",
      "rise_constraint constraint_3_0_1": {
        "index_1": [
          0.01,
          5.0,
          9.9999999
        ],
        "values": [
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          8.3333333,
          16.6666666
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      },
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10
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  },
  "pin Q": {
    "direction": "output",
    "function": "IQ",
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        "fall_power power_outputs_1": {
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              -0.0010397,
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              -0.0010125,
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              -0.0010268,
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              -0.0078335,
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              -0.0012195,
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              -0.008056,
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        },
        "related_pin": "D",
        "rise_power power_outputs_1": {
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              -0.0004242,
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      },
      {
        "fall_power power_outputs_1": {
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          "index_2": [
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              -0.001516,
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              -0.0015023,
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          ]
        },
        "related_pin": "GATE",
        "rise_power power_outputs_1": {
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          ]
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      },
      {
        "fall_power power_outputs_1": {
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          "index_2": [
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              -6.925e-05,
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              -5.615e-05,
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        "related_pin": "RESET_B",
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          ]
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      }
    ],
    "max_capacitance": 0.495921,
    "max_transition": 9.960518,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
      {
        "cell_fall del_1_7_7": {
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        "cell_rise del_1_7_7": {
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}