| { |
| "area": 18.768, |
| "cell_footprint": "a21boi", |
| "cell_leakage_power": 2.195205, |
| "driver_waveform_fall": "ramp", |
| "driver_waveform_rise": "ramp", |
| "leakage_power": [ |
| { |
| "value": 2.3920284, |
| "when": "!A1&!A2&B1_N" |
| }, |
| { |
| "value": 1.8296326, |
| "when": "!A1&!A2&!B1_N" |
| }, |
| { |
| "value": 2.5134184, |
| "when": "!A1&A2&B1_N" |
| }, |
| { |
| "value": 1.8295998, |
| "when": "!A1&A2&!B1_N" |
| }, |
| { |
| "value": 2.4762736, |
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| }, |
| { |
| "value": 1.8296058, |
| "when": "A1&!A2&!B1_N" |
| }, |
| { |
| "value": 4.2855142, |
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| }, |
| { |
| "value": 0.4055703, |
| "when": "A1&A2&!B1_N" |
| } |
| ], |
| "pg_pin VGND": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VGND" |
| }, |
| "pg_pin VNB": { |
| "pg_type": "primary_ground", |
| "voltage_name": "VNB" |
| }, |
| "pg_pin VPB": { |
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| "voltage_name": "VPB" |
| }, |
| "pg_pin VPWR": { |
| "pg_type": "primary_power", |
| "voltage_name": "VPWR" |
| }, |
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| "clock": "false", |
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| "fall_capacitance": 0.00851, |
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| 0.01, |
| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
| 0.650743, |
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| ], |
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| 0.0157578, |
| 0.015772, |
| 0.015807, |
| 0.0158899 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
| 0.0230506, |
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| }, |
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| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
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| }, |
| "pin A2": { |
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| "clock": "false", |
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| "fall_capacitance": 0.009053, |
| "internal_power": { |
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| 0.0230506, |
| 0.0531329, |
| 0.122474, |
| 0.282311, |
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| 0.0169273, |
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| 0.0169015, |
| 0.016864 |
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| "rise_power power_inputs_1": { |
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| }, |
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| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.009974 |
| }, |
| "pin B1_N": { |
| "capacitance": 0.002534, |
| "clock": "false", |
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| "fall_capacitance": 0.002417, |
| "internal_power": { |
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| 0.01, |
| 0.0230506, |
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| 0.122474, |
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| 0.0267446, |
| 0.0331815 |
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| }, |
| "rise_power power_inputs_1": { |
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| 0.01, |
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| 0.282311, |
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| 0.0143181, |
| 0.0169081, |
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| } |
| }, |
| "max_transition": 1.5, |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "rise_capacitance": 0.002651 |
| }, |
| "pin Y": { |
| "direction": "output", |
| "function": "(!A1&B1_N) | (!A2&B1_N)", |
| "internal_power": [ |
| { |
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| }, |
| "related_pin": "A1", |
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| 0.01, |
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| { |
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| }, |
| "related_pin": "A2", |
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| }, |
| { |
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| [ |
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| [ |
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| }, |
| "related_pin": "B1_N", |
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| } |
| ], |
| "max_capacitance": 0.226145, |
| "max_transition": 1.49696, |
| "power_down_function": "(!VPWR + VGND)", |
| "related_ground_pin": "VGND", |
| "related_power_pin": "VPWR", |
| "timing": [ |
| { |
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