{
  "area": 18.768,
  "cell_footprint": "dlxbp",
  "cell_leakage_power": 0.001605176,
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "latch IQ,IQ_N": {
    "data_in": "D",
    "enable": "GATE"
  },
  "leakage_power": [
    {
      "value": 0.0014335,
      "when": "!D&!GATE&Q&!Q_N"
    },
    {
      "value": 0.0017938,
      "when": "D&GATE&Q&!Q_N"
    },
    {
      "value": 0.0013982,
      "when": "!D&!GATE&!Q&Q_N"
    },
    {
      "value": 0.0014136,
      "when": "!D&GATE&!Q&Q_N"
    },
    {
      "value": 0.0017805,
      "when": "D&!GATE&Q&!Q_N"
    },
    {
      "value": 0.0018114,
      "when": "D&!GATE&!Q&Q_N"
    }
  ],
  "pg_pin VGND": {
    "pg_type": "primary_ground",
    "voltage_name": "VGND"
  },
  "pg_pin VNB": {
    "pg_type": "primary_ground",
    "voltage_name": "VNB"
  },
  "pg_pin VPB": {
    "pg_type": "primary_power",
    "voltage_name": "VPB"
  },
  "pg_pin VPWR": {
    "pg_type": "primary_power",
    "voltage_name": "VPWR"
  },
  "pin D": {
    "capacitance": 0.001731,
    "clock": "false",
    "direction": "input",
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    "internal_power": {
      "fall_power power_inputs_1": {
        "index_1": [
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          0.0230506,
          0.0531329,
          0.122474,
          0.282311,
          0.650743,
          1.5
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        "values": [
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          0.0056262,
          0.0056313,
          0.0056433,
          0.0056708,
          0.0057342
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      },
      "rise_power power_inputs_1": {
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          0.0230506,
          0.0531329,
          0.122474,
          0.282311,
          0.650743,
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        "values": [
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          0.001489,
          0.0014822,
          0.0014666,
          0.0014306,
          0.0013476
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    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001832,
    "timing": [
      {
        "fall_constraint vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
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          "values": [
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              0.2320944,
              0.4839661
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              -0.1768249,
              0.022752,
              0.2697409
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              -0.4372415,
              -0.2388854,
              0.0056621
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        },
        "related_pin": "GATE",
        "rise_constraint vio_3_3_1": {
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          "index_2": [
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          "values": [
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              0.2257956
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              -0.007554,
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              0.1228496
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        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_falling",
        "violation_delay_degrade_pct": 10
      },
      {
        "fall_constraint vio_3_3_1": {
          "index_1": [
            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
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          "values": [
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              -0.0199727,
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              -0.4738626
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              -0.2608581
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              0.2514303,
              0.0044414
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        "related_pin": "GATE",
        "rise_constraint vio_3_3_1": {
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            0.01,
            0.5,
            1.5
          ],
          "index_2": [
            0.01,
            0.5,
            1.5
          ],
          "values": [
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              -0.1823262,
              -0.2781432,
              -0.3298197
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            [
              -0.0547708,
              -0.1518086,
              -0.1998229
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            [
              0.0933411,
              -0.0024759,
              -0.0565937
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_falling",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "pin GATE": {
    "capacitance": 0.001693,
    "clock": "true",
    "direction": "input",
    "fall_capacitance": 0.001602,
    "internal_power": {
      "fall_power power_inputs_1": {
        "index_1": [
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          0.0230506,
          0.0531329,
          0.122474,
          0.282311,
          0.650743,
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          0.0124428
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      },
      "rise_power power_inputs_1": {
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          0.01,
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          0.0531329,
          0.122474,
          0.282311,
          0.650743,
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        "values": [
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          0.0072762,
          0.0072197,
          0.0070893,
          0.0067888
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    },
    "max_transition": 1.5,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001785,
    "timing": {
      "related_output_pin": "Q",
      "related_pin": "GATE",
      "rise_constraint constraint_3_0_1": {
        "index_1": [
          0.01,
          0.5,
          1.5
        ],
        "values": [
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          0.8333333,
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        ]
      },
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10
    }
  },
  "pin Q": {
    "direction": "output",
    "function": "IQ",
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      {
        "fall_power power_outputs_1": {
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              -0.0006632,
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              -0.0006774,
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              0.0064862,
              -0.0269752,
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              -0.0007072,
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        },
        "related_pin": "D",
        "rise_power power_outputs_1": {
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              -8.25e-06,
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            [
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            [
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      },
      {
        "fall_power power_outputs_1": {
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        "related_pin": "GATE",
        "rise_power power_outputs_1": {
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    ],
    "max_capacitance": 0.141001,
    "max_transition": 1.495861,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "timing": [
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        "cell_rise del_1_7_7": {
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        "fall_transition del_1_7_7": {
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        "timing_sense": "positive_unate",
        "timing_type": "combinational"
      },
      {
        "cell_fall del_1_7_7": {
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