{
  "area": 22.5216,
  "cell_footprint": "sky130_fd_sc_hd__sdlclkp",
  "cell_leakage_power": 0.0007839608,
  "clock_gating_integrated_cell": "latch_posedge_precontrol",
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "leakage_power": [
    {
      "value": 0.0009111,
      "when": "CLK&!GATE&!GCLK&!SCE"
    },
    {
      "value": 0.0008201,
      "when": "!CLK&GATE&!GCLK&!SCE"
    },
    {
      "value": 0.0006808,
      "when": "!CLK&!GATE&!GCLK&SCE"
    },
    {
      "value": 0.0004883,
      "when": "CLK&!GATE&GCLK&SCE"
    },
    {
      "value": 0.0008199,
      "when": "!CLK&GATE&!GCLK&SCE"
    },
    {
      "value": 0.0008656,
      "when": "!CLK&!GATE&!GCLK&!SCE"
    },
    {
      "value": 0.0006275,
      "when": "CLK&GATE&GCLK&!SCE"
    },
    {
      "value": 0.0006273,
      "when": "CLK&GATE&GCLK&SCE"
    },
    {
      "value": 0.0010275,
      "when": "CLK&GATE&!GCLK&!SCE"
    },
    {
      "value": 0.0008882,
      "when": "CLK&!GATE&!GCLK&SCE"
    },
    {
      "value": 0.0010273,
      "when": "CLK&GATE&!GCLK&SCE"
    },
    {
      "value": 0.0006238,
      "when": "CLK&!GATE&GCLK&!SCE"
    }
  ],
  "pg_pin,VGND": {
    "pg_type": "primary_ground",
    "related_bias_pin": "VPB",
    "voltage_name": "VGND"
  },
  "pg_pin,VNB": {
    "pg_type": "nwell",
    "physical_connection": "device_layer",
    "voltage_name": "VNB"
  },
  "pg_pin,VPB": {
    "pg_type": "pwell",
    "physical_connection": "device_layer",
    "voltage_name": "VPB"
  },
  "pg_pin,VPWR": {
    "pg_type": "primary_power",
    "related_bias_pin": "VNB",
    "voltage_name": "VPWR"
  },
  "pin,CLK": {
    "capacitance": 0.003654,
    "clock": "true",
    "clock_gate_clock_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.003347,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0281727,
          0.0793701,
          0.223607,
          0.629961,
          1.77477,
          5.0
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        "values": [
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          0.011654,
          0.0116517,
          0.0116581,
          0.0116761,
          0.0117268,
          0.0118697
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      },
      "rise_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0281727,
          0.0793701,
          0.223607,
          0.629961,
          1.77477,
          5.0
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        "values": [
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          0.0048057,
          0.0046689,
          0.0046603,
          0.004636,
          0.0045675,
          0.0043747
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      }
    },
    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.00396,
    "timing": {
      "fall_constraint,constraint_3_0_1": {
        "index_1": [
          0.01,
          2.5,
          5.0
        ],
        "values": [
          0.418455,
          4.1666666,
          8.3333333
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      },
      "related_output_pin": "GCLK",
      "related_pin": "CLK",
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10
    }
  },
  "pin,GATE": {
    "capacitance": 0.001631,
    "clock": "false",
    "clock_gate_enable_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001446,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0281727,
          0.0793701,
          0.223607,
          0.629961,
          1.77477,
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        "values": [
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          0.0041784,
          0.0045053,
          0.0054264,
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          0.0153311
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      },
      "rise_power,power_inputs_1": {
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          0.0793701,
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          1.77477,
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        "values": [
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          0.0082122,
          0.0082408,
          0.0083212,
          0.0085479,
          0.0091865
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    },
    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001816,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
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          "values": [
            [
              0.9340068,
              2.4039287,
              3.8343895
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            [
              -0.1477314,
              1.3057109,
              2.7325094
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            [
              -0.9025329,
              0.5545716,
              1.9612286
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              0.3608867,
              1.4536113,
              2.2999656
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            [
              -0.5121113,
              0.5641338,
              1.3885153
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            [
              -1.0435241,
              0.0144105,
              0.8351299
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
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            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -0.8988789,
              -2.3614765,
              -3.7937681
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            [
              0.1755352,
              -1.2797383,
              -2.7010436
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            [
              0.9266745,
              -0.53043,
              -1.9315937
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -0.1371602,
              -1.2005879,
              -2.0066588
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            [
              0.5820293,
              -0.4649189,
              -1.2618346
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            [
              1.1189352,
              0.0829733,
              -0.7121113
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "pin,GCLK": {
    "clock_gate_out_pin": "true",
    "direction": "output",
    "internal_power": {
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          0.07937005,
          0.2236068,
          0.6299605,
          1.774768,
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        "index_2": [
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          0.005108638,
          0.01632949,
          0.05219636,
          0.1668429,
          0.5333046
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        "values": [
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            0.0129796,
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            -0.0361445,
            -0.1544485,
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          [
            0.0144608,
            0.0135318,
            0.0105355,
            0.0001378,
            -0.0356179,
            -0.1539291,
            -0.533749
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          [
            0.014228,
            0.0132989,
            0.0103488,
            -6.35e-05,
            -0.035818,
            -0.1541091,
            -0.5339467
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          [
            0.0139742,
            0.0130496,
            0.0100549,
            -0.0002792,
            -0.0360527,
            -0.1543389,
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          [
            0.0138475,
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            0.0099255,
            -0.0004511,
            -0.0362249,
            -0.1544589,
            -0.5342694
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          [
            0.0135125,
            0.0125688,
            0.0094776,
            -0.0009426,
            -0.0367305,
            -0.1548238,
            -0.5345143
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          [
            0.0127301,
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            0.0081492,
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            -0.1553783,
            -0.534935
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      },
      "related_pin": "CLK",
      "rise_power,power_outputs_1": {
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          0.5333046
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        "values": [
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            0.5657028
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            0.0222363,
            0.0339368,
            0.0713948,
            0.1877236,
            0.5667996
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        ]
      }
    },
    "max_capacitance": 0.533305,
    "max_transition": 5.025983,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "state_function": "(CLK*M0)",
    "timing": {
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          0.0281727,
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        "index_2": [
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        "values": [
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            0.6259704,
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            1.5483429
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            0.8840835,
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            1.0455603,
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            1.6210703,
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            3.5730028,
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            3.7744563,
            3.9858623,
            4.5494826
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        ]
      },
      "cell_rise,del_1_7_7": {
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        "index_2": [
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            2.2686082,
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            2.1889641,
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            2.5989242,
            3.3925447,
            5.9145764
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      },
      "fall_transition,del_1_7_7": {
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          0.0793701,
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          1.77477,
          5
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        "index_2": [
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          0.166843,
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        "values": [
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            0.0720951,
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            0.0855481,
            0.1132163,
            0.182503,
            0.393551,
            1.1151744
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          [
            0.0721107,
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            0.0856004,
            0.1133642,
            0.182512,
            0.3935446,
            1.1093324
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          [
            0.0715483,
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            0.0860307,
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            0.1816455,
            0.392708,
            1.1182134
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            0.0717158,
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            0.1827977,
            0.3922756,
            1.1159915
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            0.0717636,
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            0.0719787,
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            0.3931273,
            1.1102781
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            0.1194483,
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            0.1343845,
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            0.2211339,
            0.4109015,
            1.1224028
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      },
      "related_pin": "CLK",
      "rise_transition,del_1_7_7": {
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          0.629961,
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        "index_2": [
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        "values": [
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            0.5358418,
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            0.066057,
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            0.0665056,
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            0.1041931,
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            0.2374147,
            0.552938,
            1.603924,
            5.0254974
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        ]
      },
      "timing_sense": "positive_unate",
      "timing_type": "combinational"
    }
  },
  "pin,M0": {
    "direction": "internal",
    "internal_node": "M0",
    "related_ground_pin": "VNB",
    "related_power_pin": "VPWR"
  },
  "pin,SCE": {
    "capacitance": 0.001549,
    "clock": "false",
    "clock_gate_test_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001428,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
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          0.0793701,
          0.223607,
          0.629961,
          1.77477,
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        ],
        "values": [
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      },
      "rise_power,power_inputs_1": {
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          0.01,
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          0.0793701,
          0.223607,
          0.629961,
          1.77477,
          5.0
        ],
        "values": [
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    },
    "max_transition": 5.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.001671,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
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              0.9559795,
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              3.7611472
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            [
              -0.1385762,
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              2.6574361
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            [
              -0.8952086,
              0.5362611,
              1.8879863
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
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            5.0
          ],
          "values": [
            [
              0.3846904,
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              2.4061666
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            [
              -0.466335,
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              1.5020406
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            [
              -0.9776062,
              0.1077943,
              0.9596416
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          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -0.9190205,
              -2.3523212,
              -3.7205261
            ],
            [
              0.1663799,
              -1.2595967,
              -2.6278015
            ],
            [
              0.9211813,
              -0.5121195,
              -1.8620136
            ]
          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            2.5,
            5.0
          ],
          "index_2": [
            0.01,
            2.5,
            5.0
          ],
          "values": [
            [
              -0.1554707,
              -1.2628438,
              -2.1128601
            ],
            [
              0.539915,
              -0.5399922,
              -1.3790222
            ],
            [
              1.0603414,
              -0.0104105,
              -0.8402851
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "statetable,CLK GATE SCE,M0": {
    "table": [
      "L L L : - : L",
      "L L H : - : H",
      "L H L : - : H",
      "L H H : - : H",
      "H - - : - : N"
    ]
  }
}