| { | |
| "area": 27.5264, | |
| "cell_footprint": "sky130_fd_sc_hd__o2bb2ai", | |
| "cell_leakage_power": 0.01518072, | |
| "driver_waveform_fall": "ramp", | |
| "driver_waveform_rise": "ramp", | |
| "leakage_power": [ | |
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| "value": 0.0373724, | |
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| }, | |
| { | |
| "value": 0.0469022, | |
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| }, | |
| { | |
| "value": 0.0373723, | |
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| }, | |
| { | |
| "value": 0.0501297, | |
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| }, | |
| { | |
| "value": 0.0041286, | |
| "when": "!A1_N&A2_N&!B1&B2" | |
| }, | |
| { | |
| "value": 0.0001955, | |
| "when": "!A1_N&A2_N&!B1&!B2" | |
| }, | |
| { | |
| "value": 0.0041254, | |
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| { | |
| "value": 0.0022073, | |
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| }, | |
| { | |
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| }, | |
| { | |
| "value": 0.0002031, | |
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| }, | |
| { | |
| "value": 0.0041321, | |
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| }, | |
| { | |
| "value": 0.0022133, | |
| "when": "A1_N&!A2_N&B1&!B2" | |
| }, | |
| { | |
| "value": 0.0041341, | |
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| }, | |
| { | |
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| { | |
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| }, | |
| { | |
| "value": 0.0041341, | |
| "when": "A1_N&A2_N&B1&!B2" | |
| } | |
| ], | |
| "pg_pin,VGND": { | |
| "pg_type": "primary_ground", | |
| "related_bias_pin": "VPB", | |
| "voltage_name": "VGND" | |
| }, | |
| "pg_pin,VNB": { | |
| "pg_type": "nwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VNB" | |
| }, | |
| "pg_pin,VPB": { | |
| "pg_type": "pwell", | |
| "physical_connection": "device_layer", | |
| "voltage_name": "VPB" | |
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| "pg_pin,VPWR": { | |
| "pg_type": "primary_power", | |
| "related_bias_pin": "VNB", | |
| "voltage_name": "VPWR" | |
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| "clock": "false", | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
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| }, | |
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| 0.0128079, | |
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| "rise_power,power_inputs_1": { | |
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| }, | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.008393 | |
| }, | |
| "pin,B2": { | |
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| "clock": "false", | |
| "direction": "input", | |
| "fall_capacitance": 0.007483, | |
| "input_voltage": "GENERAL", | |
| "internal_power": { | |
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| 0.0281727, | |
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| 0.629961, | |
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| "rise_power,power_inputs_1": { | |
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| }, | |
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| "related_ground_pin": "VGND", | |
| "related_power_pin": "VPWR", | |
| "rise_capacitance": 0.008421 | |
| }, | |
| "pin,Y": { | |
| "direction": "output", | |
| "function": "(!B1&!B2) | (A1_N&A2_N)", | |
| "internal_power": [ | |
| { | |
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| "related_pin": "A1_N", | |
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| { | |
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| }, | |
| "related_pin": "A2_N", | |
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| { | |
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| "related_pin": "B1", | |
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