{
  "area": 21.2704,
  "cell_footprint": "sky130_fd_sc_hd__dlclkp",
  "cell_leakage_power": 9.587459,
  "clock_gating_integrated_cell": "latch_posedge",
  "driver_waveform_fall": "ramp",
  "driver_waveform_rise": "ramp",
  "leakage_power": [
    {
      "value": 9.4230392,
      "when": "CLK&!GATE&!GCLK"
    },
    {
      "value": 9.9196287,
      "when": "!CLK&GATE&!GCLK"
    },
    {
      "value": 9.1156123,
      "when": "CLK&GATE&GCLK"
    },
    {
      "value": 9.0112966,
      "when": "!CLK&!GATE&!GCLK"
    },
    {
      "value": 9.8786828,
      "when": "CLK&GATE&!GCLK"
    },
    {
      "value": 10.1764916,
      "when": "CLK&!GATE&GCLK"
    }
  ],
  "pg_pin,VGND": {
    "pg_type": "primary_ground",
    "related_bias_pin": "VPB",
    "voltage_name": "VGND"
  },
  "pg_pin,VNB": {
    "pg_type": "nwell",
    "physical_connection": "device_layer",
    "voltage_name": "VNB"
  },
  "pg_pin,VPB": {
    "pg_type": "pwell",
    "physical_connection": "device_layer",
    "voltage_name": "VPB"
  },
  "pg_pin,VPWR": {
    "pg_type": "primary_power",
    "related_bias_pin": "VNB",
    "voltage_name": "VPWR"
  },
  "pin,CLK": {
    "capacitance": 0.004444,
    "clock": "true",
    "clock_gate_clock_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.004266,
    "internal_power": {
      "fall_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0316228,
          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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        "values": [
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          0.0122744,
          0.0122027,
          0.012144,
          0.0121266,
          0.0122394
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      },
      "rise_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0316228,
          0.1,
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          1.0,
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          9.9999999
        ],
        "values": [
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          0.0033371,
          0.0032302,
          0.003061,
          0.0026948
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      }
    },
    "max_transition": 10.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.004623,
    "timing": {
      "fall_constraint,constraint_3_0_1": {
        "index_1": [
          0.01,
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          9.9999999
        ],
        "values": [
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          8.3333333,
          16.6666666
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      },
      "related_output_pin": "GCLK",
      "related_pin": "CLK",
      "sim_opt": "runlvl=5 accurate=1",
      "timing_type": "min_pulse_width",
      "violation_delay_degrade_pct": 10
    }
  },
  "pin,GATE": {
    "capacitance": 0.001552,
    "clock": "false",
    "clock_gate_enable_pin": "true",
    "direction": "input",
    "fall_capacitance": 0.001554,
    "internal_power": {
      "fall_power,power_inputs_1": {
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          0.1,
          0.316228,
          1.0,
          3.16228,
          9.9999999
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        "values": [
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          0.0036251,
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          0.0060518,
          0.0121846
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      },
      "rise_power,power_inputs_1": {
        "index_1": [
          0.01,
          0.0316228,
          0.1,
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          1.0,
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          9.9999999
        ],
        "values": [
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          0.0061397,
          0.0064433,
          0.0075734
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      }
    },
    "max_transition": 10.0,
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "rise_capacitance": 0.00155,
    "timing": [
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
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          "index_2": [
            0.01,
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            9.9999999
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          "values": [
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              0.4121562,
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              2.8867167
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            [
              -1.1021178,
              0.404832,
              1.3614563
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            [
              -1.921413,
              -0.4510843,
              0.4872295
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            5.0,
            9.9999999
          ],
          "index_2": [
            0.01,
            5.0,
            9.9999999
          ],
          "values": [
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              0.3663799,
              1.9648825,
              2.9984111
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            [
              -0.6132263,
              0.8644267,
              1.8302064
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            [
              -1.048,
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              1.3533184
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "setup_rising",
        "violation_delay_degrade_pct": 10
      },
      {
        "fall_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            5.0,
            9.9999999
          ],
          "index_2": [
            0.01,
            5.0,
            9.9999999
          ],
          "values": [
            [
              -0.3477314,
              -1.8180602,
              -2.6996114
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            [
              1.1225973,
              -0.3770283,
              -1.3153421
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            [
              1.9363993,
              0.4733949,
              -0.4521016
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          ]
        },
        "related_pin": "CLK",
        "rise_constraint,vio_3_3_1": {
          "index_1": [
            0.01,
            5.0,
            9.9999999
          ],
          "index_2": [
            0.01,
            5.0,
            9.9999999
          ],
          "values": [
            [
              -0.1627949,
              -1.6990416,
              -2.6574971
            ],
            [
              0.7069479,
              -0.701125,
              -1.6046488
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            [
              1.1856669,
              -0.1967712,
              -1.0764912
            ]
          ]
        },
        "sim_opt": "runlvl=5 accurate=1",
        "timing_type": "hold_rising",
        "violation_delay_degrade_pct": 10
      }
    ]
  },
  "pin,GCLK": {
    "clock_gate_out_pin": "true",
    "direction": "output",
    "internal_power": {
      "fall_power,power_outputs_1": {
        "index_1": [
          0.01,
          0.03162278,
          0.1,
          0.3162278,
          1,
          3.162278,
          10
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        "index_2": [
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          0.007365557,
          0.02826984,
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          0.4164463,
          1.598368
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        "values": [
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            0.013913,
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            -0.3894554,
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            0.0145675,
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            0.0088892,
            -0.0098216,
            -0.0873735,
            -0.3888428,
            -1.5469919
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          [
            0.014201,
            0.013017,
            0.0085388,
            -0.0101771,
            -0.0877167,
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            -1.54743
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          [
            0.0139756,
            0.0127844,
            0.0083129,
            -0.0104827,
            -0.0879775,
            -0.3894371,
            -1.5476724
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          [
            0.0136975,
            0.01249,
            0.0078925,
            -0.0110415,
            -0.0884631,
            -0.3897085,
            -1.5478918
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          [
            0.0146256,
            0.013295,
            0.0081655,
            -0.0119101,
            -0.0891016,
            -0.3900993,
            -1.5481103
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          [
            0.0153403,
            0.0139228,
            0.0086384,
            -0.011596,
            -0.0896209,
            -0.390646,
            -1.5480028
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        ]
      },
      "related_pin": "CLK",
      "rise_power,power_outputs_1": {
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          0.1,
          0.3162278,
          1,
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          10
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        "index_2": [
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        "values": [
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            0.1252072,
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            1.5686007
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        ]
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    },
    "max_capacitance": 1.598368,
    "max_transition": 10.001677,
    "power_down_function": "(!VPWR + VGND)",
    "related_ground_pin": "VGND",
    "related_power_pin": "VPWR",
    "state_function": "(CLK*M0)",
    "timing": {
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          1,
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        "index_2": [
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        "values": [
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            3.6507031
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            2.2396849,
            2.8672955,
            5.2294404
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            4.0283794,
            4.1904311,
            4.4810147,
            5.1452949,
            7.5111046
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        ]
      },
      "cell_rise,del_1_7_7": {
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          0.1,
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          1,
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          10
        ],
        "index_2": [
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        "values": [
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          [
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            3.5810188,
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            10.3245803
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        ]
      },
      "fall_transition,del_1_7_7": {
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          1,
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        ],
        "index_2": [
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        "values": [
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            0.1112018,
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            0.1874909,
            0.3737881,
            1.1645562,
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            1.2112035,
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        ]
      },
      "related_pin": "CLK",
      "rise_transition,del_1_7_7": {
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          0.1,
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          1,
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          10
        ],
        "index_2": [
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        "values": [
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            2.6543949,
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          [
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          ],
          [
            0.0701755,
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            0.1163203,
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            2.6553479,
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          ],
          [
            0.0708553,
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          [
            0.0766008,
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          ],
          [
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            2.6407596,
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          ],
          [
            0.218962,
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            0.2689226,
            0.3743761,
            0.7831592,
            2.662609,
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        ]
      },
      "timing_sense": "positive_unate",
      "timing_type": "combinational"
    }
  },
  "pin,M0": {
    "direction": "internal",
    "internal_node": "M0",
    "related_ground_pin": "VNB",
    "related_power_pin": "VPWR"
  },
  "statetable,CLK GATE,M0": {
    "table": [
      "L L : - : L",
      "L H : - : H",
      "H - : - : N"
    ]
  }
}