tree e7a05f0be935d8c70db26ed08603f817c7d7f6e9
parent 3b141743ef43d12f6dc7906ea41d8a48aa927705
author Tim 'mithro' Ansell <me@mith.ro> 1605025190 -0800
committer Tim 'mithro' Ansell <tansell@google.com> 1605027045 -0800

verilog: Fixing spurious `wire 1'b0` definition in lpflow_inputisolatch.

Fixes https://github.com/google/skywater-pdk/issues/178.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
Signed-off-by: Tim Edwards <tim@opencircuitdesign.com>