| commit | 25ed6683d31d66fc8e3d6bb157b300250a557edb | [log] [tgz] |
|---|---|---|
| author | Tim 'mithro' Ansell <me@mith.ro> | Tue Nov 10 08:19:50 2020 -0800 |
| committer | Tim 'mithro' Ansell <tansell@google.com> | Tue Nov 10 08:50:45 2020 -0800 |
| tree | e7a05f0be935d8c70db26ed08603f817c7d7f6e9 | |
| parent | 3b141743ef43d12f6dc7906ea41d8a48aa927705 [diff] |
verilog: Fixing spurious `wire 1'b0` definition in lpflow_inputisolatch. Fixes https://github.com/google/skywater-pdk/issues/178. Signed-off-by: Tim 'mithro' Ansell <me@mith.ro> Signed-off-by: Tim Edwards <tim@opencircuitdesign.com>
diff --git a/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch.functional.pp.v b/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch.functional.pp.v index a3e6eec..c61b7ad 100644 --- a/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch.functional.pp.v +++ b/cells/lpflow_inputisolatch/sky130_fd_sc_hd__lpflow_inputisolatch.functional.pp.v
@@ -54,7 +54,6 @@ // Local signals wire buf_Q; - wire 1'b0 ; // Name Output Other arguments sky130_fd_sc_hd__udp_dlatch$lP_pp$PG$N dlatch0 (buf_Q , D, SLEEP_B, 1'b0, VPWR, VGND);