)]}'
{
  "commit": "d6d2a3c6960aac0a0b12fc21221c31777bbf284d",
  "tree": "81248dc664990b8bc65670f332c4f3def36d88b0",
  "parents": [
    "441f50c01b160b9f13133550e729006b79cee69a",
    "69a2d7bf77eb2bf3ad7f13e0b7a8cbb8ec68028e"
  ],
  "author": {
    "name": "Ethan Mahintorabi",
    "email": "ethanmoon@google.com",
    "time": "Wed Apr 20 17:05:25 2022 -0500"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Apr 20 17:05:25 2022 -0500"
  },
  "message": "Merge pull request #26 from lnis-uofu/main\n\nAdded RRAM Cells 1T1R, 4T1R and 4T1R MUX2 ",
  "tree_diff": []
}