Fixes ReRAM Verilog-A model naming convention. Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
diff --git a/cells/reram_cell/sky130_fd_pr_reram__reram_cell.va b/cells/reram_cell/sky130_fd_pr_reram__reram_cell.va index 978e0a8..8377a90 100644 --- a/cells/reram_cell/sky130_fd_pr_reram__reram_cell.va +++ b/cells/reram_cell/sky130_fd_pr_reram__reram_cell.va
@@ -17,7 +17,7 @@ `include "constants.vams" `include "disciplines.vams" -module rram2(TE, BE); +module sky130_fd_pr_reram__reram_cell(TE, BE); inout TE; // top electrode inout BE; // bottom electrode electrical TE, BE;