| { |
| "description": "Special I/O PAD that provides additionally a regulated output buffer and a differential input buffer. SIO cells are ONLY available IN pairs (see top_sio_macro).", |
| "file_prefix": "sky130_fd_io__top_sio", |
| "library": "sky130_fd_io", |
| "name": "top_sio", |
| "parameters": [ |
| [ |
| "SLOW_1_DELAY", |
| "" |
| ], |
| [ |
| "SLOW_0_DELAY", |
| "" |
| ], |
| [ |
| "SLOW_1_DELAY", |
| "" |
| ], |
| [ |
| "SLOW_0_DELAY", |
| "" |
| ] |
| ], |
| "ports": [ |
| [ |
| "signal", |
| "IN_H", |
| "output", |
| "" |
| ], |
| [ |
| "signal", |
| "PAD_A_NOESD_H", |
| "inout", |
| "" |
| ], |
| [ |
| "signal", |
| "PAD", |
| "inout", |
| "" |
| ], |
| [ |
| "signal", |
| "DM", |
| "input", |
| "[2:0]" |
| ], |
| [ |
| "signal", |
| "HLD_H_N", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "INP_DIS", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "IN", |
| "output", |
| "" |
| ], |
| [ |
| "signal", |
| "ENABLE_H", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "OE_N", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "SLOW", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "VTRIP_SEL", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "VINREF", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "VOUTREF", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "VREG_EN", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "IBUF_SEL", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "REFLEAK_BIAS", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "PAD_A_ESD_0_H", |
| "inout", |
| "" |
| ], |
| [ |
| "signal", |
| "TIE_LO_ESD", |
| "output", |
| "" |
| ], |
| [ |
| "signal", |
| "HLD_OVR", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "OUT", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "PAD_A_ESD_1_H", |
| "inout", |
| "" |
| ], |
| [ |
| "power", |
| "VSSIO", |
| "inout", |
| "supply0" |
| ], |
| [ |
| "power", |
| "VSSIO_Q", |
| "inout", |
| "supply0" |
| ], |
| [ |
| "power", |
| "VSSD", |
| "inout", |
| "supply0" |
| ], |
| [ |
| "power", |
| "VCCD", |
| "inout", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VDDIO", |
| "inout", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VCCHIB", |
| "inout", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VDDIO_Q", |
| "inout", |
| "supply1" |
| ] |
| ], |
| "type": "cell", |
| "verilog_name": "sky130_fd_io__top_sio" |
| } |