// Copyright 2019-2021 SkyWater PDK Authors
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
// This code is *alternatively* available under a BSD-3-Clause license, see
// details in the README.md at the top level and the license text at
// https://github.com/google/skywater-pdk-libs-sky130_bag3_pr/blob/master/LICENSE.alternative
//
// SPDX-License-Identifier: BSD-3-Clause OR Apache 2.0

LAYOUT PATH  "{{ layout_file }}"
LAYOUT PRIMARY "{{ cell_name }}"
LAYOUT SYSTEM {{layout_type}}

SOURCE PATH "{{ netlist_file }}"
SOURCE PRIMARY "{{ cell_name }}"
SOURCE SYSTEM SPICE

LAYOUT CASE YES
SOURCE CASE YES
LVS COMPARE CASE YES

MASK SVDB DIRECTORY "svdb" QUERY XRC

LVS REPORT "{{ cell_name }}.rcx.report"

LVS REPORT OPTION NONE
LVS FILTER UNUSED OPTION NONE SOURCE
LVS FILTER UNUSED OPTION NONE LAYOUT
LVS FILTER R(SH) SHORT SOURCE
LVS FILTER R(SH) SHORT LAYOUT
LVS REPORT MAXIMUM 50
LVS POWER NAME VDD
LVS GROUND NAME VSS

LVS RECOGNIZE GATES NONE

LVS REDUCE SPLIT GATES NO
LVS REDUCE PARALLEL MOS YES
LVS SHORT EQUIVALENT NODES NO

LVS ABORT ON SOFTCHK NO
LVS ABORT ON SUPPLY ERROR YES
LVS IGNORE PORTS NO
LVS SHOW SEED PROMOTIONS NO
LVS SHOW SEED PROMOTIONS MAXIMUM 50

LVS ISOLATE SHORTS NO

VIRTUAL CONNECT COLON YES
VIRTUAL CONNECT REPORT NO

LVS EXECUTE ERC YES
ERC RESULTS DATABASE "{{ cell_name }}.erc.results"
ERC SUMMARY REPORT "{{ cell_name }}.erc.summary" REPLACE HIER
ERC CELL NAME YES CELL SPACE XFORM
ERC MAXIMUM RESULTS 1000
ERC MAXIMUM VERTEX 4096

DRC ICSTATION YES

// S8 specific features

UNIT CAPACITANCE ff

// Filter Devices in include file to give LVS & xRC consistency

LVS FILTER R(cds_thru) SHORT SOURCE	       
LVS FILTER R(cds_thru) SHORT LAYOUT	       

LVS FILTER Dpar                    OPEN  SOURCE
LVS FILTER Dpar                    OPEN  LAYOUT
LVS FILTER Dpar(DNWDIODE_PW)                    OPEN  SOURCE
LVS FILTER Dpar(DNWDIODE_PW)                    OPEN  LAYOUT

LVS FILTER Probe                   OPEN  SOURCE
LVS FILTER Probe                   OPEN  LAYOUT

LVS Filter icecap 	open source

LVS Filter s8fmlt_iref_termx  open source
LVS Filter s8fmlt_neg_termx   open source
LVS Filter s8fmlt_termx       open source
LVS Filter s8fmlt_vdac_termx  open source

//# diff/tap devices

LVS FILTER diff_dev                OPEN  SOURCE
LVS FILTER diff_dev                OPEN  LAYOUT
LVS FILTER tap_dev                 OPEN  SOURCE
LVS FILTER tap_dev                 OPEN  LAYOUT

//# dummy device to prevent empty cells from becoming subckt primitives

LVS FILTER cad_dummy_open_device   OPEN  SOURCE
LVS FILTER cad_dummy_open_device   OPEN  LAYOUT

// Custom netlist settings
PEX REDUCE MINRES SHORT 0.000001
PEX POWER LAYOUT VDD
PEX GROUND LAYOUT VSS

// Include to filter out shorts from current summer
PEX NETLIST FILTER R(SH) SOURCE SHORT
PEX NETLIST FILTER R(SH) LAYOUT SHORT

PEX NETLIST FILTER R(cds_thru) SOURCE SHORT
PEX NETLIST FILTER R(cds_thru) LAYOUT SHORT

// DSPF
// Configure to use DPSF to match other BAG extraction methods
PEX NETLIST {{ cell_name }}.spf DSPF SOURCEBASED

// Spectre
//PEX NETLIST {{ cell_name }}.pex.netlist SPECTRE SOURCEBASED 

INCLUDE "$PDK_HOME/PEX/xRC/cap_models"
INCLUDE "$PDK_HOME/PEX/xRC/extLvsRules_s8_5lm"