# Copyright 2019-2021 SkyWater PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# This code is *alternatively* available under a BSD-3-Clause license, see
# details in the README.md at the top level and the license text at
# https://github.com/google/skywater-pdk-libs-sky130_bag3_pr/blob/master/LICENSE.alternative
#
# SPDX-License-Identifier: BSD-3-Clause OR Apache 2.0
inc_list:
  4: ['${BAG_TECH_CONFIG_DIR}/calibre_setup/source.added']
  5: []
  6: []
  7: []
netlist_map:
  BAG_prim:
    mim_34:
      cell_name: mim_34
      in_terms: []
      io_terms: [BOT, TOP]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        num_cols: [3, '']
        num_rows: [3, '']
        unit_height: [3, '']
        unit_width: [3, '']
    mim_45:
      cell_name: mim_45
      in_terms: []
      io_terms: [BOT, TOP]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        num_cols: [3, '']
        num_rows: [3, '']
        unit_height: [3, '']
        unit_width: [3, '']
    mim_standard:
      cell_name: mim_standard
      in_terms: []
      io_terms: [BOT, TOP]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        num_cols: [3, '']
        num_rows: [3, '']
        unit_height: [3, '']
        unit_width: [3, '']
    nmos4_hv:
      cell_name: nmos4_hv
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    nmos4_hvesd:
      cell_name: nmos4_hvesd
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    nmos4_lvt:
      cell_name: nmos4_lvt
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    nmos4_standard:
      cell_name: nmos4_standard
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    nmos4_svt:
      cell_name: nmos4_svt
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_hv:
      cell_name: pmos4_hv
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_hvesd:
      cell_name: pmos4_hvesd
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_hvt:
      cell_name: pmos4_hvt
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_lvt:
      cell_name: pmos4_lvt
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_standard:
      cell_name: pmos4_standard
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    pmos4_svt:
      cell_name: pmos4_svt
      in_terms: []
      io_terms: [B, D, G, S]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        nf: [3, '']
        w: [3, '']
    res_high_res:
      cell_name: res_high_res
      in_terms: []
      io_terms: [BULK, MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_metal_1:
      cell_name: res_metal_1
      in_terms: []
      io_terms: [MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_metal_2:
      cell_name: res_metal_2
      in_terms: []
      io_terms: [MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_metal_3:
      cell_name: res_metal_3
      in_terms: []
      io_terms: [MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_metal_4:
      cell_name: res_metal_4
      in_terms: []
      io_terms: [MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_metal_5:
      cell_name: res_metal_5
      in_terms: []
      io_terms: [MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
    res_standard:
      cell_name: res_standard
      in_terms: []
      io_terms: [BULK, MINUS, PLUS]
      is_prim: true
      lib_name: BAG_prim
      nets: []
      out_terms: []
      props:
        l: [3, '']
        w: [3, '']
  ahdlLib:
    comparator:
      cell_name: comparator
      in_terms: [sigin, sigref]
      io_terms: []
      is_prim: true
      lib_name: ahdlLib
      nets: []
      out_terms: [sigout]
      props:
        comp_slope: [3, '']
        sigin_offset: [3, '']
        sigout_high: [3, '']
        sigout_low: [3, '']
      va: ${CDSHOME}/tools/dfII/samples/artist/ahdlLib/comparator/veriloga/veriloga.va
  analogLib:
    cap:
      cell_name: cap
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        c: [3, '']
        l: [3, '']
        m: [3, '']
        w: [3, '']
    cccs:
      cell_name: cccs
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        fgain: [3, '1.0']
        maxm: [3, '']
        minm: [3, '']
        vref: [3, '']
    ccvs:
      cell_name: ccvs
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        hgain: [3, '1.0']
        maxm: [3, '']
        minm: [3, '']
        vref: [3, '']
    dcblock:
      cell_name: dcblock
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        c: [3, 1u]
    dcfeed:
      cell_name: dcfeed
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        l: [3, 1u]
    gnd:
      cell_name: gnd
      ignore: true
      in_terms: []
      io_terms: [gnd!]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props: {}
    idc:
      cell_name: idc
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        acm: [3, '']
        acp: [3, '']
        idc: [3, '']
        pacm: [3, '']
        pacp: [3, '']
        srcType: [3, dc]
        xfm: [3, '']
    ideal_balun:
      cell_name: ideal_balun
      in_terms: []
      io_terms: [d, c, p, n]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props: {}
    ind:
      cell_name: ind
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        l: [3, '']
        m: [3, '']
        r: [3, '']
    iprobe:
      cell_name: iprobe
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props: {}
    ipulse:
      cell_name: ipulse
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        i1: [3, '']
        i2: [3, '']
        idc: [3, '']
        per: [3, '']
        pw: [3, '']
        srcType: [3, pulse]
        td: [3, '']
    ipwlf:
      cell_name: ipwlf
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        fileName: [3, '']
        srcType: [3, pwl]
    isin:
      cell_name: isin
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        freq: [3, '']
        ia: [3, '']
        idc: [3, '']
        srcType: [3, sine]
    mind:
      cell_name: mind
      in_terms: []
      io_terms: []
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        ind1: [3, '']
        ind2: [3, '']
        k: [3, '0']
    n12port:
      cell_name: n12port
      in_terms: []
      io_terms: [t1, b1, t2, b2, t3, b3, t4, b4, t5, b5, t6, b6, t7, b7, t8, b8, t9,
        b9, t10, b10, t11, b11, t12, b12]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n1port:
      cell_name: n1port
      in_terms: []
      io_terms: [t1, b1]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n2port:
      cell_name: n2port
      in_terms: []
      io_terms: [t1, b1, t2, b2]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n3port:
      cell_name: n3port
      in_terms: []
      io_terms: [t1, b1, t2, b2, t3, b3]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n4port:
      cell_name: n4port
      in_terms: []
      io_terms: [t1, b1, t2, b2, t3, b3, t4, b4]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n6port:
      cell_name: n6port
      in_terms: []
      io_terms: [t1, b1, t2, b2, t3, b3, t4, b4, t5, b5, t6, b6]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    n8port:
      cell_name: n8port
      in_terms: []
      io_terms: [t1, b1, t2, b2, t3, b3, t4, b4, t5, b5, t6, b6, t7, b7, t8, b8]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        dataFile: [3, '']
        interp: [3, linear]
        thermalnoise: [3, yes]
    port:
      cell_name: port
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        num: [3, '']
        r: [3, '']
        srcType: [3, sine]
    res:
      cell_name: res
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        l: [3, '']
        m: [3, '']
        r: [3, '']
        w: [3, '']
    switch:
      cell_name: switch
      in_terms: []
      io_terms: [N+, N-, NC+, NC-]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        rc: [3, '']
        ro: [3, '']
        vt1: [3, '']
        vt2: [3, '']
    vccs:
      cell_name: vccs
      in_terms: []
      io_terms: [PLUS, MINUS, NC+, NC-]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        ggain: [3, '1.0']
        maxm: [3, '']
        minm: [3, '']
    vcvs:
      cell_name: vcvs
      in_terms: []
      io_terms: [PLUS, MINUS, NC+, NC-]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        egain: [3, '1.0']
        maxm: [3, '']
        minm: [3, '']
    vdc:
      cell_name: vdc
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        acm: [3, '']
        acp: [3, '']
        pacm: [3, '']
        pacp: [3, '']
        srcType: [3, dc]
        vdc: [3, '']
        xfm: [3, '']
    vpulse:
      cell_name: vpulse
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        per: [3, '']
        pw: [3, '']
        srcType: [3, pulse]
        td: [3, '']
        v1: [3, '']
        v2: [3, '']
        vdc: [3, '']
    vpwlf:
      cell_name: vpwlf
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        fileName: [3, '']
        srcType: [3, pwl]
    vsin:
      cell_name: vsin
      in_terms: []
      io_terms: [PLUS, MINUS]
      is_prim: true
      lib_name: analogLib
      nets: []
      out_terms: []
      props:
        freq: [3, '']
        srcType: [3, sine]
        va: [3, '']
        vdc: [3, '']
  basic:
    cds_thru:
      cell_name: cds_thru
      ignore: false
      in_terms: []
      io_terms: [src, dst]
      is_prim: true
      lib_name: basic
      nets: []
      out_terms: []
      props: {}
    noConn:
      cell_name: noConn
      ignore: true
      in_terms: []
      io_terms: [noConn]
      is_prim: true
      lib_name: basic
      nets: []
      out_terms: []
      props: {}
prim_files: {4: skywater130/netlist_setup/bag_prim.cdl, 5: '', 6: '', 7: skywater130/netlist_setup/bag_prim.scs}