merging implant changes
diff --git a/.idea/inspectionProfiles/profiles_settings.xml b/.idea/inspectionProfiles/profiles_settings.xml index 83bdf84..707d445 100644 --- a/.idea/inspectionProfiles/profiles_settings.xml +++ b/.idea/inspectionProfiles/profiles_settings.xml
@@ -25,4 +25,4 @@ <option name="USE_PROJECT_PROFILE" value="false" /> <version value="1.0" /> </settings> -</component> \ No newline at end of file +</component>
diff --git a/.idea/misc.xml b/.idea/misc.xml index 2b735f1..b44661b 100644 --- a/.idea/misc.xml +++ b/.idea/misc.xml
@@ -25,4 +25,4 @@ <preferredVcsName>ApexVCS</preferredVcsName> </component> <component name="ProjectRootManager" version="2" project-jdk-name="Python 3.7" project-jdk-type="Python SDK" /> -</project> \ No newline at end of file +</project>
diff --git a/.idea/modules.xml b/.idea/modules.xml index 6a0b79f..d593e71 100644 --- a/.idea/modules.xml +++ b/.idea/modules.xml
@@ -26,4 +26,4 @@ <module fileurl="file://$PROJECT_DIR$/.idea/skywater130.iml" filepath="$PROJECT_DIR$/.idea/skywater130.iml" /> </modules> </component> -</project> \ No newline at end of file +</project>
diff --git a/calibre_setup/.cgilvsdb b/calibre_setup/.cgilvsdb index 6ea0df3..6762b6d 120000 --- a/calibre_setup/.cgilvsdb +++ b/calibre_setup/.cgilvsdb
@@ -1 +1 @@ -lvs_adc.runset \ No newline at end of file +lvs.runset \ No newline at end of file
diff --git a/calibre_setup/lvs_adc.runset b/calibre_setup/lvs_adc.runset deleted file mode 100644 index cdac099..0000000 --- a/calibre_setup/lvs_adc.runset +++ /dev/null
@@ -1,40 +0,0 @@ -*lvsRulesFile: ${PDK_HOME}/LVS/Calibre/lvs_s8_opts -*lvsRunDir: $BAG_WORK_DIR/calibre_run/lvs/AAA_SAR_lay/AAA_Slice -*lvsLayoutPaths: /tools/B/felicia_guo/bag3-sky130-2/calibre_run/lvs/AAA_SAR_lay/AAA_Slice/layout.gds -*lvsLayoutPrimary: AAA_Slice -*lvsLayoutLibrary: AAA_SAR_lay -*lvsLayoutView: layout -*lvsSourcePath: /tools/B/felicia_guo/bag3-sky130-2/gen_outputs/bag_sar/AAA_Slice.cdl -*lvsSourcePrimary: AAA_Slice -*lvsSourceLibrary: AAA_SAR_lay -*lvsSourceView: schematic -*lvsSpiceFile: AAA_Slice.sp -*lvsPowerNames: VDD -*lvsGroundNames: VSS -*lvsRecognizeGates: NONE -*lvsConfigureSplitGates: 1 -*lvsReduceSplitGates: 0 -*lvsERCDatabase: AAA_Slice.erc.results -*lvsERCSummaryFile: AAA_Slice.erc.summary -*lvsIncludeSVRFCmds: 1 -*lvsSVRFCmds: {LVS FILTER R(SH) SHORT SOURCE} {} -*lvsReportFile: AAA_Slice.lvs.report -*lvsViewReport: 0 -*lvsSVDBxcal: 1 -*lvsSVDBcci: 1 -*lvsSVDBtxref: 1 -*lvsSVDBnopinloc: 1 -*lvsMaskDBFile: AAA_Slice.maskdb -*cmnWarnLayoutOverwrite: 0 -*cmnWarnSourceOverwrite: 0 -*cmnPromptSaveRunset: 0 -*cmnShowOptions: 1 -*cmnSaveRunsetChanges: 0 -*cmnVConnectColon: 1 -*cmnTemplate_RN: $BAG_WORK_DIR/calibre_run/lvs/%L/%l -*cmnSlaveHosts: {use {}} {hostName {}} {cpuCount {}} {a32a64 {}} {rsh {}} {maxMem {}} {workingDir {}} {layerDir {}} {mgcLibPath {}} {launchName {}} -*cmnLSFSlaveTbl: {use 1} {totalCpus 1} {minCpus 1} {architecture {{}}} {minMemory {{}}} {resourceOptions {{}}} {submitOptions {{}}} -*cmnGridSlaveTbl: {use 1} {totalCpus 1} {minCpus 1} {architecture {{}}} {minMemory {{}}} {resourceOptions {{}}} {submitOptions {{}}} -*cmnFDILayoutLibrary: AAA_SAR_lay -*cmnFDILayoutView: layout -*cmnFDIDEFLayoutPath: AAA_Slice.def
diff --git a/src/BAG_prim/__init__.py b/src/BAG_prim/__init__.py index c1f90c9..0cebf6d 100644 --- a/src/BAG_prim/__init__.py +++ b/src/BAG_prim/__init__.py
@@ -22,4 +22,4 @@ # details in the README.md at the top level and the license text at # https://github.com/google/skywater-pdk-libs-sky130_bag3_pr/blob/master/LICENSE.alternative # -# SPDX-License-Identifier: BSD-3-Clause OR Apache 2.0 \ No newline at end of file +# SPDX-License-Identifier: BSD-3-Clause OR Apache 2.0
diff --git a/workspace_setup/PDK b/workspace_setup/PDK index 61572bf..8c2529c 120000 --- a/workspace_setup/PDK +++ b/workspace_setup/PDK
@@ -1 +1 @@ -/tools/commercial/skywater/swtech130/skywater-src-nda/s8/V2.0.0 \ No newline at end of file +PDK_root/V1.3.0 \ No newline at end of file
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