)]}'
{
  "commit": "c5bd980a84ed99d427f08721619727ecff7cfa0e",
  "tree": "738a73dc98548149c9f3484501f52baa181d7720",
  "parents": [
    "adea4260e7579250f15719e3dd801c3570abf949"
  ],
  "author": {
    "name": "Wojciech Gryncewicz",
    "email": "wgryncewicz@antmicro.com",
    "time": "Tue Dec 01 15:26:39 2020 +0100"
  },
  "committer": {
    "name": "Wojciech Gryncewicz",
    "email": "wgryncewicz@antmicro.com",
    "time": "Tue Dec 01 15:26:39 2020 +0100"
  },
  "message": "Added option for reduction of long clock sequences in wavedrom converter\n\nSigned-off-by: Wojciech Gryncewicz \u003cwgryncewicz@antmicro.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "ed9b43b1959482cb17be9f8ce31b34eed6ef761d",
      "old_mode": 33261,
      "old_path": "scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py",
      "new_id": "7e4adf13bc2b6e04560e07c3e6c71ab33486a097",
      "new_mode": 33261,
      "new_path": "scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py"
    }
  ]
}