Improved handling of testbenches with infinite clock
Signed-off-by: Wojciech Gryncewicz <wgryncewicz@antmicro.com>
diff --git a/scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py b/scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py
index 69f3ef4..ed9b43b 100755
--- a/scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py
+++ b/scripts/python-skywater-pdk/skywater_pdk/cells/generate/vcd2wavedrom.py
@@ -75,8 +75,11 @@
currtag = 'body'
vcd[currtag] = ''
- if 'var' not in vcd or 'dumpvars' not in vcd:
- raise SyntaxError("Invalid VCD file format")
+ if 'var' not in vcd:
+ raise SyntaxError("No variables recorded in VCD file")
+ if 'dumpvars' not in vcd:
+ print ("Warning: intial variable states undefined")
+ var['dumpvars'] = ''
return vcd
@@ -213,9 +216,8 @@
svg.saveas(outfile)
except KeyboardInterrupt:
sys.exit(1)
- except (AssertionError, FileNotFoundError, ChildProcessError) as ex:
- eprint (f'Error: {type(ex).__name__}')
- eprint (f'{ex.args}')
+ except (SyntaxError, AssertionError, FileNotFoundError, ChildProcessError) as ex:
+ eprint (f'{type(ex).__name__}: {", ".join(ex.args)}')
errors +=1
eprint (f'\n{len(infile)} files processed, {errors} errors.')
return 0 if errors else 1
diff --git a/scripts/python-skywater-pdk/skywater_pdk/cells/generate/waveform.py b/scripts/python-skywater-pdk/skywater_pdk/cells/generate/waveform.py
index ec3b865..a21d2ad 100755
--- a/scripts/python-skywater-pdk/skywater_pdk/cells/generate/waveform.py
+++ b/scripts/python-skywater-pdk/skywater_pdk/cells/generate/waveform.py
@@ -49,6 +49,8 @@
testbedfile = os.path.join(cellpath, define_data['file_prefix'] + '.tb.v')
assert os.path.exists(testbedfile), testbedfile
insertppdefine = use_power_pins
+ insertdumpvars = True
+ insertfinish = True
prvline=''
with open(tmptestbed,'w') as ttb:
with open(testbedfile,'r') as tbf:
@@ -58,12 +60,17 @@
line = '`define USE_POWER_PINS\n' + line
insertppdefine = False
# add dumpfile define
- if prvline.strip(' \n\r')=='begin':
+ if insertdumpvars and prvline.strip(' \n\r')=='begin':
line = line[:-len(line.lstrip())] + \
'$dumpfile("' + outfile + '");\n' + \
line[:-len(line.lstrip())] + \
'$dumpvars(1,top);\n' + \
line
+ insertdumpvars = False
+ # add finish command, to stop paraller threads
+ if insertfinish and line.strip(' \n\r')=='end' and not '$finish' in prvline:
+ line = prvline[:-len(prvline.lstrip())] + '$finish;\n' + line
+ insertfinish = False
# remove power pins from reg - optinal, but makes output more readable
if not use_power_pins:
for p in pp:
