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foss-eda-tools/skywater-pdk/3ac9f24a1bdf3e1ca388d643bf547e7acc1a03e9
commit
3ac9f24a1bdf3e1ca388d643bf547e7acc1a03e9
[log]
author
Tim Ansell <me@mith.ro>
Mon Oct 05 20:12:03 2020 -0700
committer
GitHub <noreply@github.com>
Mon Oct 05 20:12:03 2020 -0700
tree
caa50eeecc05f88f9625214c15b5784970b23714
parent
3f373a2b99a2f009e3f54138bfe0e039f18cfb95 [diff]
parent
d1de6e82feba6e1ac3ae2ac7bfdf2a12f9e68ff5 [diff]
Merge pull request #166 from mithro/verilog-fix-2

verilog: Fixing usage of cell reserved word.
tree: caa50eeecc05f88f9625214c15b5784970b23714
  1. .github/
  2. docs/
  3. libraries/
  4. scripts/
  5. .gitignore
  6. .gitmodules
  7. .readthedocs.yml
  8. .travis.yml
  9. AUTHORS
  10. environment.yml
  11. LICENSE
  12. Makefile
  13. README.rst
  14. README.src.rst
  15. requirements.txt