diff --git a/docs/contents.rst b/docs/contents.rst
new file mode 100644
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--- /dev/null
+++ b/docs/contents.rst
@@ -0,0 +1,9 @@
+PDK Contents
+============
+
+.. toctree::
+    :name: pdk-contents
+    :maxdepth: 4
+
+    Libraries <contents/libraries>
+    File Types <contents/file_types>
diff --git a/docs/contents/file_types.rst b/docs/contents/file_types.rst
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index 0000000..4629613
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+++ b/docs/contents/file_types.rst
@@ -0,0 +1,45 @@
+File Types
+==========
+
+
++------------------------------+-------------------------------------------+---------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------+
+| File Type                    | What does it do?                          |                            Open Tooling Options                     |                                    Closed Tooling Options                                              |
+|                              |                                           +-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+|                              |                                           | Tool            | Status | File format            | Source          | Tool              | Status       | File format             | Source                                    |
++==============================+===========================================+=================+========+========================+=================+===================+==============+=========================+===========================================+
+| Parameterized Cell           | Primitive devices that have layouts       | Magic           | Ready  | TCL script             | Hand Written    | Cadence Virtuoso  | In Progress  | Cadence PCells          | Hand Written                              |
+| Generators                   | determined by parameterization.           |                 |        |                        |                 |                   |              |                         |                                           |
+|                              |                                           |                 |        |                        |                 |                   |              |                         |                                           |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| DRC Deck                     | Verifies a design meets the design rules  | Magic           | Ready  | Magic techfile         | Hand Written    | Mentor Calibre    | In progress  | SVRF Rule Decks         | Generated from documentation data         |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| LVS Deck                     | Verifies layout and schematic are         | Magic           | Ready  | Magic techfile         | Hand Written    | Mentor Calibre    | In progress  | SVRF Rule Decks         | Generated from documentation data         |
+|                              | equivalent.                               +-----------------+--------+------------------------+-----------------+                   |              |                         |                                           |
+|                              |                                           | Netgen          | Ready  | Netgen setup file      | Hand Written    |                   |              |                         |                                           |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| GDS Generator                | Creates mask layout data.                 | Magic           | Ready  | Magic techfile         | Hand designed   |                                                                                                        |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+--------------------------------------------------------------------------------------------------------+
+| Library Exchange Format      | Abstract cell view.                       | Magic           | Ready  | LEF                    | Generated from  | ?                                                                                                      |
+| Macros                       |                                           |                 |        |                        | GDS data        |                                                                                                        |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+--------------------------------------------------------------------------------------------------------+
+| Timing Files                 | Describes pin-to-pin timing               | ?               | Ready  | Liberty                | Generated from  | ?                                                                                                      |
+|                              |                                           |                 |        |                        | JSON data       | ?                                                                                                      |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Netlists                     | Transistor level circuit description      | Ngspice         | Ready  | Ngspice or CDL         | ?               | ?                 | ?            | OpenAccess?             | Generated from spice files                |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Device Models                | Models for use with SPICE                 | Ngspice         | Ready  | SPICE simulation file  | ?               | Cadence Spectre   | In Progress  | Spectre?                | Generated from spice files                |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Schematic                    | Transistor level circuit description      | Xcircuit?       | None   | EDIF                   | ?               | Cadence Virtuoso  | In Progress  | OpenAccess?             | ?                                         |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Schematic Symbol             | Symbol for use in schematics              | Xcircuit?       | None   | EDIF                   | ?               | Cadence Virtuoso  | In Progress  | OpenAccess?             | ?                                         |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Verilog testbench            | Digital simulation                        | Icarus Verilog  | Ready  | Verilog                | ngsim           | Cadence ?         | ?            | OpenAccess?             | Generated from Verilog files              |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| XSPICE                       | Mixed-signal simulation                   | Ngspice         | Ready  | SPICE                  | ?               | ?                 | ?            | ?                       | ?                                         |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+|                              | Rules for scribe lines and saw lines      | ?               | None   | Unknown                | ?               | Cadence ?         | In Progress  | Cadence SKILL script    | Hand written                              |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+| Parameterized Cell           | Rules for seal ring                       | Magic           | Ready  | TCL script             | ?               | Cadence ?         | In Progress  | Cadence SKILL script    | Hand written                              |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
+|                              | Fill structure rules                      | Magic           | None   | Magic techfile         | ?               | Cadence ?         | In Progress  | Cadence SKILL script    | Hand written                              |
++------------------------------+-------------------------------------------+-----------------+--------+------------------------+-----------------+-------------------+--------------+-------------------------+-------------------------------------------+
diff --git a/docs/contents/libraries.rst b/docs/contents/libraries.rst
new file mode 100644
index 0000000..97c1dd4
--- /dev/null
+++ b/docs/contents/libraries.rst
@@ -0,0 +1,136 @@
+Libraries
+=========
+
+Library Naming
+--------------
+
+Libraries in the SKY130 PDK are named using the following scheme;
+
+  :lib_process:`<Process name>` _ :lib_src:`<Library Source Abbreviation>` _ :lib_type:`<Library Type Abbreviation>` [_ :lib_name:`<Library Name>`]
+
+All sections are **lower case** and separated by an **underscore**. The sections are;
+
+
+- The :lib_process:`Process name` in is the name of the process technology, for this PDK it is always :lib_process:`sky130`.
+
+- The :lib_src:`Library Source Abbreviations` is a short abbreviation for who created and is responsible for the library. The table below shows the current list of :lib_src:`Library Source Abbreviations`;
+
+  +----------------------------+----------------------------------------+
+  | Library Source             | :lib_src:`Library Source Abbreviation` |
+  +============================+========================================+
+  | The SkyWater Foundry       | :lib_src:`fd`                          |
+  +----------------------------+----------------------------------------+
+  | Efabless                   | :lib_src:`ef`                          |
+  +----------------------------+----------------------------------------+
+  | Oklahoma State University  | :lib_src:`osu`                         |
+  +----------------------------+----------------------------------------+
+
+- The :lib_type:`Library Type Abbreviation` is a short two letter abbreviation for the type of content found in the library. The table below shows the current list of :lib_type:`Library Type Abbreviations`;
+
+  +--------------------------------+---------------------------------------+
+  | Library Type                   | :lib_type:`Library Type Abbreviation` |
+  +================================+=======================================+
+  | Primitive Cells                | :lib_type:`pr`                        |
+  +--------------------------------+---------------------------------------+
+  | Digital Standard Cells         | :lib_type:`sc`                        |
+  +--------------------------------+---------------------------------------+
+  | Build Space (Flash, SRAM, etc) | :lib_type:`sp`                        |
+  +--------------------------------+---------------------------------------+
+  | IO and Periphery               | :lib_type:`io`                        |
+  +--------------------------------+---------------------------------------+
+  | Miscellaneous                  | :lib_type:`xx`                        |
+  +--------------------------------+---------------------------------------+
+
+- The :lib_name:`Library Name` is an optional short abbreviated name used when there are multiple libraries of a given type released from a single :lib_src:`library source`. If only one library of a given type is going to ever be released, this can be left out.
+
+
+.. include:: versioning.rst
+
+
+Creating New Libraries
+----------------------
+
+Third party developers are encourage to create new and interesting libraries for usage with the SKY130 process technology. These libraries can even be included in the SKY130 PDK if it meets the following criteria;
+
+ - It is released under an OSI approved license.
+ - TODO: Finish the criteria.
+
+
+:lib_type:`Primitive` Libraries
+-------------------------------
+
+:lib_src:`Foundry` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :glob:
+    :maxdepth: 1
+    :caption: Foundry provided Primitives
+    :name: sky130-lib-foundry-primitives
+
+    libraries/sky130_fd_pr_*/README
+
+
+:lib_type:`Digital Standard Cell` Libraries
+-------------------------------------------
+
+:lib_src:`Foundry` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :glob:
+    :maxdepth: 1
+    :name: sky130-lib-foundry-sc
+
+    libraries/sky130_fd_sc_*/README
+
+
+:lib_src:`Third party` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :maxdepth: 1
+    :name: sky130-lib-thirdparty-sc
+
+    libraries/sky130_osu_sc/README
+
+
+:lib_type:`Build Space` Libraries
+---------------------------------
+
+The SKY130 currently offers two :lib_type:`build space` libraries. Build space libraries are designed to be used with technologies like memory compilers and built into larger macros. The provided libraries have specially crafted design rules to enable higher density compared to other libraries.
+
+:lib_src:`Foundry` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :glob:
+    :maxdepth: 1
+    :caption: Foundry provided Build Spaces
+    :name: sky130-lib-foundry-sp
+
+    libraries/sky130_fd_sp_*/README
+
+
+:lib_type:`IO and Periphery` Libraries
+--------------------------------------
+
+:lib_src:`Foundry` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :maxdepth: 1
+    :name: sky130-lib-foundry-io
+
+    libraries/sky130_fd_io/README
+
+
+:lib_src:`Third party` provided
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. toctree::
+    :maxdepth: 1
+    :name: sky130-lib-thirdparty-sc
+
+    libraries/sky130_ef_io/README
+
diff --git a/docs/contents/libraries/Makefile b/docs/contents/libraries/Makefile
new file mode 100644
index 0000000..42c8388
--- /dev/null
+++ b/docs/contents/libraries/Makefile
@@ -0,0 +1,6 @@
+update:
+	for i in ../../../libraries/*; do \
+		if [ ! -d $$i ]; then continue; fi; \
+		ln -sf -T $$i/latest $$(basename $$i); \
+	done
+	git add *
diff --git a/docs/index.rst b/docs/index.rst
index 53ea8f3..bfe1dfc 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -5,6 +5,8 @@
 
     Design Rules <rules>
 
+    contents
+
     versioning
     Current Status <status>
     known_issues