commit eb489b35762172278efb2d5dc39999d10c130e02
author Tim 'mithro' Ansell <tansell@google.com> Tue May 19 10:47:05 2020 -0700
committer Tim 'mithro' Ansell <tansell@google.com> Tue May 19 10:47:05 2020 -0700
tree 4689a44369234a0bb6c9cf26247e96d902ee1ff6
parent 9b19d77e2c468c022ef6b92e5d66339c8f9a12ea

Fixes.

scripts/python-skywater-pdk/generate_verilog_blackbox.py

diff --git a/scripts/python-skywater-pdk/generate_verilog_blackbox.py b/scripts/python-skywater-pdk/generate_verilog_blackbox.py
index 783c900..9e43542 100755
--- a/scripts/python-skywater-pdk/generate_verilog_blackbox.py
+++ b/scripts/python-skywater-pdk/generate_verilog_blackbox.py
@@ -398,7 +398,7 @@
         if name in ('UDP_OUT',):
             return cls.DATA_OUT_WORD
 
-        if re.search('^S[0-9]+$', name):
+        if re.search('^[SR][0-9]+$', name):
             return cls.DATA_CONTROL
 
         if re.search('^((SET)|(RESET)|[SR])(_[NB])?$', name):
@@ -452,6 +452,8 @@
             return cls.POWER_OTHER
         if 'SHORT' in name:
             return cls.POWER_OTHER
+        if 'WELL' in name:
+            return cls.POWER_OTHER
 
         if 'MET' in name:
             return cls.POWER_OTHER