| commit | 9b19d77e2c468c022ef6b92e5d66339c8f9a12ea | [log] [tgz] |
|---|---|---|
| author | Tim 'mithro' Ansell <tansell@google.com> | Tue May 19 06:32:21 2020 -0700 |
| committer | Tim 'mithro' Ansell <tansell@google.com> | Tue May 19 06:32:21 2020 -0700 |
| tree | 20a09f2b17eda801e051a01029a7850cf0bc042a | |
| parent | 2ea567e3220ca3a2a3d51b8efbca313556d94252 [diff] |
Fix extra whitespace.
diff --git a/scripts/python-skywater-pdk/generate_verilog_blackbox.py b/scripts/python-skywater-pdk/generate_verilog_blackbox.py index 4dd09aa..783c900 100755 --- a/scripts/python-skywater-pdk/generate_verilog_blackbox.py +++ b/scripts/python-skywater-pdk/generate_verilog_blackbox.py
@@ -802,6 +802,7 @@ if i == 0: assert r[-1] == 'Comments', (i, r) + seek_backwards(f) f.write('\n') continue f.write(' ;')