Simulation Models
=================

Spectre
-------

The Spectre models have been successfully used with the Spectre simulator, and simulation results match the electrical parameter specs.

Spectre Model Qualification
~~~~~~~~~~~~~~~~~~~~~~~~~~~

Full model qualification requires the following checks:

* Confirm that all supported devices netlist and simulate when the appropriate model files are included.
* Check process corner simulation results against electrical specification limits.
* Run performance simulations on various IP and determine if results sufficiently match existing published simulation results.
* Compare simulated performance of isolated devices and IP to measured hardware results.

The V1.3.0 models have not been systematically tested with all five of those tasks. The V1.3.0 devices have been netlisted and simulated, certain characteristics have been evaluated at nominal and process corners, and a small number of IP blocks have been evaluated. The V1.3.0 models are considered functional but not fully qualified.

Spectre Model Setup
~~~~~~~~~~~~~~~~~~~

All stack-specific Spectre model files are found in the directory $PDK_HOME/MODELS/SPECTRE/s8phirs_10r /Models. The file design_wrapper.lib.scs provides the sections necessary to simulate every corner (e.g. typical tt, fast-fast ff, slow-fast sf, etc.). For the FETs, the corner naming is based on P followed by N, so sf indicates the slow PMOS fast NMOS corner. Table 6 elaborates the sections in the Design Wrapper.

.. table:: Design Wrapper Sections

    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             | **Devices**                        | **Section** | **Included Files**            | **Description**                     |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Transistor Corners**      | FET, PNP                           | tt_fet      | tt.cor                        | Typical pmos, typical nmos          |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | ff_fet      | ff.cor                        | Fast pmos, fast nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | ss_fet      | ss.cor                        | Slow pmos, slow nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | fs_fet      | fs.cor                        | Fast pmos, slow nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | sf_fet      | sf.cor                        | Slow pmos, fast nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Parasitic Corners**       | Parasitic Capacitors and Resistors | tt_parRC    | trtc.cor                      | Typical resistor, typical capacitor |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | hl_parRC    | hrlc.cor                      | High resistor, low capacitor        |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | lh_parRC    | lrhc.cor                      | Low resistor, high capacitor        |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Linear Device Corners**   | Capacitors and Resistors           | tt_rc       | trtclin.cor                   | Typical resistor, typical capacitor |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | lh_rc       | lrhclin.cor                   | Low resistor, high capacitor        |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | hl_rc       | hrlclin.cor                   | High resistor, low capacitor        |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | ll_rc       | lrlclin.cor                   | Low resistor, low capacitor         |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | hh_rc       | hrhclin.cor                   | High resistor, high capacitor       |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Cell Transistor Corners** | Cell FETs, low leakage models      | tt_cell     | ttcell.cor                    | Typical pmos, typical nmos          |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | ff_cell     | ffcell.cor                    | Fast pmos, fast nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | ss_cell     | sscell.cor                    | Slow pmos, slow nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | fs_cell     | fscell.cor                    | Fast pmos, slow nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | sf_cell     | sfcell.cor                    | Slow pmos, fast nmos                |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Wafer**                   | Standard FETs, BJTs                | wafer_fet   | wafer.cor                     | FET models extracted from wafer     |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             | Cell FETs                          | wafer_cell  | wafer_cell.cor                | FET models extracted from wafer     |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Leakage**                 | Standard FETs, BJTs                | leak_fet    | leak.cor                      | Average worst case leakage models   |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             | Cell FETs                          | leak_cell   | leakcell.cor                  | Average worst case leakage models   |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **NPN Corners**             | NPN Corners                        | npn_t       | npn_t.cor                     | Typical NPN                         |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | npn_f       | npn_f.cor                     | Fast NPN                            |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    |                             |                                    | npn_s       | npn_s.cor                     | Slow NPN                            |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+
    | **Montecarlo**              | All devices                        | mc          | monte.cor critical_params.cor | Montecarlo process and mismatch     |
    +-----------------------------+------------------------------------+-------------+-------------------------------+-------------------------------------+

This PDK does not support process Montecarlo. The models are available but they have not been qualified. To run Montecarlo, all of the corner sections need to be excluded and the mc section needs to be included.

All units in the PDK are specified in microns (1e-6). For example, the minimum size FET has W=0.28 and L=0.15.

There is an example of automatic model file loading in the .cdsinit found in $PDK_HOME/VirtuosoOA/examples. The resulting Cadence Model Library Setup dialog is shown here.

|process5|