commit | 5088097d1c5ee5656f0a025a6e86512bc0b50a9d | [log] [tgz] |
---|---|---|
author | Piotr Zierhoffer <pzierhoffer@antmicro.com> | Mon May 04 22:12:13 2020 +0200 |
committer | Piotr Zierhoffer <pzierhoffer@antmicro.com> | Mon May 04 23:50:32 2020 +0200 |
tree | 065eacbc2187f44fefa947c710136202e50d6ed4 | |
parent | b0cd587fab27c2ea58d85e3c8ce9b2129566b992 [diff] |
Add verilog diagram to conf.py
diff --git a/docs/conf.py b/docs/conf.py index a149171..455b579 100644 --- a/docs/conf.py +++ b/docs/conf.py
@@ -45,6 +45,7 @@ 'sphinx.ext.mathjax', 'sphinx.ext.ifconfig', 'sphinx.ext.githubpages', + 'sphinxcontrib_verilog_diagrams', ] # Add any paths that contain templates here, relative to this directory.