diff --git a/common.py b/common.py
index 57f4a99..65e4e69 100755
--- a/common.py
+++ b/common.py
@@ -1650,70 +1650,70 @@
     # -----------------------------------------------------
 
     'cell_1rw_1r'           : 'openram_dp_cell',
-    'col_cap_cell_1rw_1r'   : 'openram_dp_cap_col',
-    'cap_col_cell_1rw_1r'   : 'openram_dp_cap_col',
+    'col_cap_cell_1rw_1r'   : 'openram_dp_cell_cap_col',
+    'cap_col_cell_1rw_1r'   : 'openram_dp_cell_cap_col',
     'dummy_cell_1rw_1r'     : 'openram_dp_cell_dummy',
     'replica_cell_1rw_1r'   : 'openram_dp_cell_replica',
-    'row_cap_cell_1rw_1r'   : 'openram_dp_cap_row',
-    'cap_row_cell_1rw_1r'   : 'openram_dp_cap_row',
+    'row_cap_cell_1rw_1r'   : 'openram_dp_cell_cap_row',
+    'cap_row_cell_1rw_1r'   : 'openram_dp_cell_cap_row',
 
     #'cell_1rw_1r'          : 'openram_dp_cell',
-    'cell_1rw_1r_col_cap'   : 'openram_dp_cap_col',
-    'cell_1rw_1r_cap_col'   : 'openram_dp_cap_col',
+    'cell_1rw_1r_col_cap'   : 'openram_dp_cell_cap_col',
+    'cell_1rw_1r_cap_col'   : 'openram_dp_cell_cap_col',
     'cell_1rw_1r_dummy'     : 'openram_dp_cell_dummy',
     'cell_1rw_1r_replica'   : 'openram_dp_cell_replica',
-    'cell_1rw_1r_row_cap'   : 'openram_dp_cap_row',
-    'cell_1rw_1r_cap_row'   : 'openram_dp_cap_row',
+    'cell_1rw_1r_row_cap'   : 'openram_dp_cell_cap_row',
+    'cell_1rw_1r_cap_row'   : 'openram_dp_cell_cap_row',
 
     'cell_2port'            : 'openram_dp_cell',
-    'col_cap_cell_2port'    : 'openram_dp_cap_col',
-    'cap_col_cell_2port'    : 'openram_dp_cap_col',
+    'col_cap_cell_2port'    : 'openram_dp_cell_cap_col',
+    'cap_col_cell_2port'    : 'openram_dp_cell_cap_col',
     'dummy_cell_2port'      : 'openram_dp_cell_dummy',
     'replica_cell_2port'    : 'openram_dp_cell_replica',
-    'row_cap_cell_2port'    : 'openram_dp_cap_row',
-    'cap_row_cell_2port'    : 'openram_dp_cap_row',
+    'row_cap_cell_2port'    : 'openram_dp_cell_cap_row',
+    'cap_row_cell_2port'    : 'openram_dp_cell_cap_row',
 
     #'cell_2port'           : 'openram_dp_cell',
-    'cell_2port_col_cap'    : 'openram_dp_cap_col',
-    'cell_2port_cap_col'    : 'openram_dp_cap_col',
+    'cell_2port_col_cap'    : 'openram_dp_cell_cap_col',
+    'cell_2port_cap_col'    : 'openram_dp_cell_cap_col',
     'cell_2port_dummy'      : 'openram_dp_cell_dummy',
     'cell_2port_replica'    : 'openram_dp_cell_replica',
-    'cell_2port_row_cap'    : 'openram_dp_cap_row',
-    'cell_2port_cap_row'    : 'openram_dp_cap_row',
+    'cell_2port_row_cap'    : 'openram_dp_cell_cap_row',
+    'cell_2port_cap_row'    : 'openram_dp_cell_cap_row',
 
     # -----------------------------------------------------
 
     'cell_6t'               : 'openram_sp_cell',
-    'col_cap_cell_6t'       : 'openram_sp_cap_col',
-    'cap_col_cell_6t'       : 'openram_sp_cap_col',
+    'col_cap_cell_6t'       : 'openram_sp_cell_cap_col',
+    'cap_col_cell_6t'       : 'openram_sp_cell_cap_col',
     'dummy_cell_6t'         : 'openram_sp_cell_dummy',
     'replica_cell_6t'       : 'openram_sp_cell_replica',
-    'row_cap_cell_6t'       : 'openram_sp_cap_row',
-    'cap_row_cell_6t'       : 'openram_sp_cap_row',
+    'row_cap_cell_6t'       : 'openram_sp_cell_cap_row',
+    'cap_row_cell_6t'       : 'openram_sp_cell_cap_row',
 
     #'cell_6t'              : 'openram_sp_cell',
-    'cell_6t_col_cap'       : 'openram_sp_cap_col',
-    'cell_6t_cap_col'       : 'openram_sp_cap_col',
+    'cell_6t_col_cap'       : 'openram_sp_cell_cap_col',
+    'cell_6t_cap_col'       : 'openram_sp_cell_cap_col',
     'cell_6t_dummy'         : 'openram_sp_cell_dummy',
     'cell_6t_replica'       : 'openram_sp_cell_replica',
-    'cell_6t_row_cap'       : 'openram_sp_cap_row',
-    'cell_6t_cap_row'       : 'openram_sp_cap_row',
+    'cell_6t_row_cap'       : 'openram_sp_cell_cap_row',
+    'cell_6t_cap_row'       : 'openram_sp_cell_cap_row',
 
     'cell_1port'            : 'openram_sp_cell',
-    'col_cap_cell_1port'    : 'openram_sp_cap_col',
-    'cap_col_cell_1port'    : 'openram_sp_cap_col',
+    'col_cap_cell_1port'    : 'openram_sp_cell_cap_col',
+    'cap_col_cell_1port'    : 'openram_sp_cell_cap_col',
     'dummy_cell_1port'      : 'openram_sp_cell_dummy',
     'replica_cell_1port'    : 'openram_sp_cell_replica',
-    'row_cap_cell_1port'    : 'openram_sp_cap_row',
-    'cap_row_cell_1port'    : 'openram_sp_cap_row',
+    'row_cap_cell_1port'    : 'openram_sp_cell_cap_row',
+    'cap_row_cell_1port'    : 'openram_sp_cell_cap_row',
 
     #'cell_1port'           : 'openram_sp_cell',
-    'cell_1port_cap_col'    : 'openram_sp_cap_col',
-    'cell_1port_col_cap'    : 'openram_sp_cap_col',
+    'cell_1port_cap_col'    : 'openram_sp_cell_cap_col',
+    'cell_1port_col_cap'    : 'openram_sp_cell_cap_col',
     'cell_1port_dummy'      : 'openram_sp_cell_dummy',
     'cell_1port_replica'    : 'openram_sp_cell_replica',
-    'cell_1port_cap_row'    : 'openram_sp_cap_row',
-    'cell_1port_row_cap'    : 'openram_sp_cap_row',
+    'cell_1port_cap_row'    : 'openram_sp_cell_cap_row',
+    'cell_1port_row_cap'    : 'openram_sp_cell_cap_row',
 
     'L1M1_CDNS_594327665970': 'sram_l1m1',
     'l1m1_cdns_594327665970': 'sram_l1m1',
@@ -1785,24 +1785,24 @@
     >>> convert_cellname('cell_1rw_1r')
     'openram_dp_cell'
     >>> convert_cellname('col_cap_cell_1rw_1r')
-    'openram_dp_cap_col'
+    'openram_dp_cell_cap_col'
     >>> convert_cellname('dummy_cell_1rw_1r')
     'openram_dp_cell_dummy'
     >>> convert_cellname('replica_cell_1rw_1r')
     'openram_dp_cell_replica'
     >>> convert_cellname('row_cap_cell_1rw_1r')
-    'openram_dp_cap_row'
+    'openram_dp_cell_cap_row'
 
     >>> convert_cellname('cell_6t')
     'openram_sp_cell'
     >>> convert_cellname('col_cap_cell_6t')
-    'openram_sp_cap_col'
+    'openram_sp_cell_cap_col'
     >>> convert_cellname('dummy_cell_6t')
     'openram_sp_cell_dummy'
     >>> convert_cellname('replica_cell_6t')
     'openram_sp_cell_replica'
     >>> convert_cellname('row_cap_cell_6t')
-    'openram_sp_cap_row'
+    'openram_sp_cell_cap_row'
 
     OpenRAM prefix
     --------------
@@ -1830,27 +1830,27 @@
     >>> convert_cellname('openram_cell_1rw_1r')
     'openram_dp_cell'
     >>> convert_cellname('openram_col_cap_cell_1rw_1r')
-    'openram_dp_cap_col'
+    'openram_dp_cell_cap_col'
     >>> convert_cellname('openram_dummy_cell_1rw_1r')
     'openram_dp_cell_dummy'
     >>> convert_cellname('openram_replica_cell_1rw_1r')
     'openram_dp_cell_replica'
     >>> convert_cellname('openram_row_cap_cell_1rw_1r')
-    'openram_dp_cap_row'
+    'openram_dp_cell_cap_row'
 
     >>> convert_cellname('openram_cell_1rw_1r_cap_col')
-    'openram_dp_cap_col'
+    'openram_dp_cell_cap_col'
 
     >>> convert_cellname('openram_cell_6t')
     'openram_sp_cell'
     >>> convert_cellname('openram_col_cap_cell_6t')
-    'openram_sp_cap_col'
+    'openram_sp_cell_cap_col'
     >>> convert_cellname('openram_dummy_cell_6t')
     'openram_sp_cell_dummy'
     >>> convert_cellname('openram_replica_cell_6t')
     'openram_sp_cell_replica'
     >>> convert_cellname('openram_row_cap_cell_6t')
-    'openram_sp_cap_row'
+    'openram_sp_cell_cap_row'
 
     SRAM prefix
     -----------
@@ -1871,24 +1871,24 @@
     >>> convert_cellname('sram_cell_1rw_1r')
     'openram_dp_cell'
     >>> convert_cellname('sram_col_cap_cell_1rw_1r')
-    'openram_dp_cap_col'
+    'openram_dp_cell_cap_col'
     >>> convert_cellname('sram_dummy_cell_1rw_1r')
     'openram_dp_cell_dummy'
     >>> convert_cellname('sram_replica_cell_1rw_1r')
     'openram_dp_cell_replica'
     >>> convert_cellname('sram_row_cap_cell_1rw_1r')
-    'openram_dp_cap_row'
+    'openram_dp_cell_cap_row'
 
     >>> convert_cellname('sram_cell_6t')
     'openram_sp_cell'
     >>> convert_cellname('sram_col_cap_cell_6t')
-    'openram_sp_cap_col'
+    'openram_sp_cell_cap_col'
     >>> convert_cellname('sram_dummy_cell_6t')
     'openram_sp_cell_dummy'
     >>> convert_cellname('sram_replica_cell_6t')
     'openram_sp_cell_replica'
     >>> convert_cellname('sram_row_cap_cell_6t')
-    'openram_sp_cap_row'
+    'openram_sp_cell_cap_row'
 
     >>> convert_cellname('openram_sp_cell_opt1a_replica')
     'openram_sp_cell_opt1a_replica'