| { | |
| "cell gf180mcu_fd_sc_mcu9t5v0__latrnq_4": { | |
| "area": "90.316800", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "clear": "(!RN)" | |
| }, | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN", | |
| "value": "0.000458513" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN", | |
| "value": "0.0004947415" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN", | |
| "value": "0.0004607955" | |
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| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN", | |
| "value": "0.0004607955" | |
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| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN", | |
| "value": "0.000458513" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN", | |
| "value": "0.000560615" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN", | |
| "value": "0.000510301" | |
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| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN", | |
| "value": "0.000480865" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.000560615" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.004152", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "2.8", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
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| { | |
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| }, | |
| { | |
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| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "hold_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
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| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
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| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| }, | |
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| "clock": "true", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
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| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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| "related_pin": "E", | |
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| { | |
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| "values": [ | |
| 0.2237 | |
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| }, | |
| "pin Q": { | |
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| "function": "IQ2", | |
| "max_capacitance": "1.517", | |
| "max_transition": "2.8", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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| "related_pin": "D", | |
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| }, | |
| { | |
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| { | |
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