| { |
| "description": "positive edge triggered scan D-type flip flop", |
| "file_prefix": "gf180mcu_fd_sc_mcu7t5v0__sdffq", |
| "library": "gf180mcu_fd_sc_mcu7t5v0", |
| "name": "sdffq", |
| "parameters": [], |
| "ports": [ |
| [ |
| "signal", |
| "CLK", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "D", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "SE", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "SI", |
| "input", |
| "" |
| ], |
| [ |
| "signal", |
| "Q", |
| "output", |
| "" |
| ], |
| [ |
| "power", |
| "VDD", |
| "input", |
| "supply1" |
| ], |
| [ |
| "power", |
| "VSS", |
| "input", |
| "supply0" |
| ] |
| ], |
| "type": "cell", |
| "verilog_name": "gf180mcu_fd_sc_mcu7t5v0__sdffq" |
| } |