| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__latsnq_2": { | |
| "area": "48.294400", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "preset": "(!SETN)" | |
| }, | |
| "leakage_power ": [ | |
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| "related_pg_pin": "VDD", | |
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| "value": "3.35718e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&SETN", | |
| "value": "5.26572e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!SETN", | |
| "value": "3.45996e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&SETN", | |
| "value": "3.80736e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!SETN", | |
| "value": "3.35718e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&SETN", | |
| "value": "6.69042e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!SETN", | |
| "value": "3.36312e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&SETN", | |
| "value": "3.81006e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "6.69042e-05" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.003029", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "12", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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| { | |
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| { | |
| "when": "E&!SETN", | |
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| } | |
| ], | |
| "timing ": [ | |
| { | |
| "related_pin": "E", | |
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| "timing_type": "hold_falling", | |
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| "fall_constraint cnst_ctin_rtin_10x10": { | |
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| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_SETN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "SETN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
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| 12 | |
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| 12 | |
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| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 2.367 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
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| 0.9472, | |
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| 4.617, | |
| 6.625, | |
| 9.077, | |
| 12 | |
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| 12 | |
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| "values": [ | |
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| [ | |
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| [ | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin E": { | |
| "capacitance": "0.006396", | |
| "clock": "true", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "12", | |
| "min_pulse_width_high": "1.753", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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