| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__latrnq_2": { | |
| "area": "52.684800", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "clear": "(!RN)" | |
| }, | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN", | |
| "value": "0.00055755" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN", | |
| "value": "0.00058791" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN", | |
| "value": "0.00055002" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN", | |
| "value": "0.00055974" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN", | |
| "value": "0.00055905" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN", | |
| "value": "0.0006132" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN", | |
| "value": "0.00057186" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN", | |
| "value": "0.00056313" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.0006132" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.00306", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "15.6", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!E&!RN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
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| 0.008803, | |
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| 0.008853, | |
| 0.008838, | |
| 0.008764 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 3.925, | |
| 5.998, | |
| 8.61, | |
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| 15.6 | |
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| -0.006546, | |
| -0.006552 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "!E&RN", | |
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| 0.02, | |
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| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
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| 0.007135, | |
| 0.007133, | |
| 0.00713, | |
| 0.007128 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
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| -0.006541, | |
| -0.006547, | |
| -0.00655 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "E&!RN", | |
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| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
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| 0.007135, | |
| 0.007139, | |
| 0.007129, | |
| 0.007112, | |
| 0.007104, | |
| 0.007085, | |
| 0.00704 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
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| 15.6 | |
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| "values": [ | |
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| ] | |
| } | |
| } | |
| ], | |
| "timing ": [ | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "hold_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
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| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
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| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| -2.771, | |
| -2.422, | |
| -2.037 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
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| 8.61, | |
| 11.8, | |
| 15.6 | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| -2.162, | |
| -2.314 | |
| ] | |
| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
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| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
| [ | |
| 1.357, | |
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| 1.21, | |
| 1.075, | |
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| 0.675, | |
| 0.598, | |
| 0.561, | |
| 0.549 | |
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| [ | |
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| 0.691, | |
| 0.61, | |
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| ], | |
| [ | |
| 1.464, | |
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| 0.671, | |
| 0.608, | |
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| [ | |
| 1.61, | |
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| 0.662, | |
| 0.571 | |
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| [ | |
| 1.855, | |
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| 1.437, | |
| 1.256, | |
| 1.069, | |
| 0.902, | |
| 0.734, | |
| 0.57 | |
| ], | |
| [ | |
| 2.19, | |
| 2.15, | |
| 2.039, | |
| 1.896, | |
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| 1.55, | |
| 1.333, | |
| 1.121, | |
| 0.899, | |
| 0.67 | |
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| [ | |
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| 1.425, | |
| 1.167, | |
| 0.887 | |
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| [ | |
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| 2.375, | |
| 2.113, | |
| 1.828, | |
| 1.537, | |
| 1.215 | |
| ], | |
| [ | |
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| 2.315, | |
| 1.992, | |
| 1.647 | |
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| [ | |
| 4.207, | |
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| 3.85, | |
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| 3.493, | |
| 3.2, | |
| 2.864, | |
| 2.519, | |
| 2.139 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.1275, | |
| 0.505, | |
| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
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| 1.226, | |
| 2.349, | |
| 3.925, | |
| 5.998, | |
| 8.61, | |
| 11.8, | |
| 15.6 | |
| ], | |
| "values": [ | |
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| 4.497, | |
| 5.964, | |
| 7.707 | |
| ], | |
| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 4.683, | |
| 6.029 | |
| ] | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin E": { | |
| "capacitance": "0.007335", | |
| "clock": "true", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "15.6", | |
| "min_pulse_width_high": "1.512", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
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