| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__latrnq_2": { | |
| "area": "52.684800", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "clear": "(!RN)" | |
| }, | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN", | |
| "value": "0.01159015" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN", | |
| "value": "0.0156563" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN", | |
| "value": "0.0071126" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN", | |
| "value": "0.01170895" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN", | |
| "value": "0.0118305" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN", | |
| "value": "0.01888425" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN", | |
| "value": "0.0114257" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN", | |
| "value": "0.0143946" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.01888425" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.00307", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "3.4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!E&!RN", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
| 0.03585, | |
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| 0.04067, | |
| 0.04187, | |
| 0.04287, | |
| 0.04354, | |
| 0.04413, | |
| 0.04441, | |
| 0.04469, | |
| 0.04492 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| -0.02604, | |
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| -0.02605, | |
| -0.02615, | |
| -0.02615 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "!E&RN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| 0.02842, | |
| 0.02843, | |
| 0.02845, | |
| 0.02844, | |
| 0.02847, | |
| 0.02848 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| -0.02611, | |
| -0.02614, | |
| -0.0261 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "E&!RN", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| 0.02923, | |
| 0.0292, | |
| 0.02916, | |
| 0.02917, | |
| 0.02926, | |
| 0.02917, | |
| 0.02918, | |
| 0.02917 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
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| ], | |
| "values": [ | |
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| -0.01979 | |
| ] | |
| } | |
| } | |
| ], | |
| "timing ": [ | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "hold_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
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| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| ], | |
| [ | |
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| [ | |
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| [ | |
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| ], | |
| [ | |
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| [ | |
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| -0.712, | |
| -0.669, | |
| -0.62, | |
| -0.58 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
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| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
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| -0.52 | |
| ], | |
| [ | |
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| ], | |
| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| ], | |
| [ | |
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| [ | |
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| -0.813 | |
| ], | |
| [ | |
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| -0.701, | |
| -0.796, | |
| -0.894 | |
| ] | |
| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
| [ | |
| 0.366, | |
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| 0.292, | |
| 0.298, | |
| 0.319, | |
| 0.358, | |
| 0.416 | |
| ], | |
| [ | |
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| 0.299, | |
| 0.303, | |
| 0.324, | |
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| 0.429 | |
| ], | |
| [ | |
| 0.38, | |
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| 0.3, | |
| 0.306, | |
| 0.324, | |
| 0.363, | |
| 0.416 | |
| ], | |
| [ | |
| 0.405, | |
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| 0.323, | |
| 0.336, | |
| 0.367, | |
| 0.412 | |
| ], | |
| [ | |
| 0.454, | |
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| 0.431, | |
| 0.403, | |
| 0.383, | |
| 0.365, | |
| 0.356, | |
| 0.355, | |
| 0.375, | |
| 0.399 | |
| ], | |
| [ | |
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| 0.422, | |
| 0.402, | |
| 0.392, | |
| 0.392, | |
| 0.409 | |
| ], | |
| [ | |
| 0.603, | |
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| 0.524, | |
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| 0.446, | |
| 0.444 | |
| ], | |
| [ | |
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| 0.503, | |
| 0.495 | |
| ], | |
| [ | |
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| ], | |
| [ | |
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| 0.786, | |
| 0.747, | |
| 0.701, | |
| 0.664, | |
| 0.629 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "index_2": [ | |
| 0.02, | |
| 0.04333, | |
| 0.1252, | |
| 0.2816, | |
| 0.5252, | |
| 0.8671, | |
| 1.317, | |
| 1.884, | |
| 2.575, | |
| 3.4 | |
| ], | |
| "values": [ | |
| [ | |
| 0.389, | |
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| 0.408, | |
| 0.474, | |
| 0.589, | |
| 0.771, | |
| 1.006, | |
| 1.297, | |
| 1.66 | |
| ], | |
| [ | |
| 0.389, | |
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| 0.388, | |
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| 0.586, | |
| 0.768, | |
| 1.002, | |
| 1.295, | |
| 1.646 | |
| ], | |
| [ | |
| 0.395, | |
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| 0.471, | |
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| 0.771, | |
| 0.995, | |
| 1.287, | |
| 1.642 | |
| ], | |
| [ | |
| 0.4, | |
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| 1.267, | |
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| ], | |
| [ | |
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| 1.25, | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 1.007, | |
| 1.264, | |
| 1.573 | |
| ] | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin E": { | |
| "capacitance": "0.00733", | |
| "clock": "true", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "3.4", | |
| "min_pulse_width_high": "0.428", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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