| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__latrnq_1": { | |
| "area": "48.294400", | |
| "latch IQ2,IQN2": { | |
| "enable": "E", | |
| "data_in": "D", | |
| "clear": "(!RN)" | |
| }, | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&!RN", | |
| "value": "2.418174e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&!E&RN", | |
| "value": "3.391308e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&!RN", | |
| "value": "2.428542e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!D&E&RN", | |
| "value": "2.428542e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&!RN", | |
| "value": "2.418174e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&!E&RN", | |
| "value": "4.232736e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&!RN", | |
| "value": "2.710098e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "D&E&RN", | |
| "value": "2.627154e-05" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "4.232736e-05" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin D": { | |
| "capacitance": "0.002628", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "21", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!E&!RN", | |
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| 3.156, | |
| 5.278, | |
| 8.07, | |
| 11.59, | |
| 15.88, | |
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| } | |
| }, | |
| { | |
| "when": "!E&RN", | |
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| 0.001626, | |
| 0.001374 | |
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| -0.00137 | |
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| } | |
| }, | |
| { | |
| "when": "E&!RN", | |
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| 1.644, | |
| 3.156, | |
| 5.278, | |
| 8.07, | |
| 11.59, | |
| 15.88, | |
| 21 | |
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| 0.001658, | |
| 0.001366 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| } | |
| } | |
| ], | |
| "timing ": [ | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "hold_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
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| 1.644, | |
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| 8.07, | |
| 11.59, | |
| 15.88, | |
| 21 | |
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| 21 | |
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| "values": [ | |
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| [ | |
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| [ | |
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| [ | |
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| -6.407 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
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| [ | |
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| [ | |
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| [ | |
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| -9.754, | |
| -10.5 | |
| ] | |
| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "E", | |
| "sdf_cond": "ENABLE_RN === 1'b1", | |
| "timing_type": "setup_falling", | |
| "when": "RN", | |
| "fall_constraint cnst_ctin_rtin_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.1648, | |
| 0.6731, | |
| 1.644, | |
| 3.156, | |
| 5.278, | |
| 8.07, | |
| 11.59, | |
| 15.88, | |
| 21 | |
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| 15.88, | |
| 21 | |
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| "values": [ | |
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| 0.436, | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 2.678, | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| 9.042, | |
| 7.845 | |
| ] | |
| ] | |
| }, | |
| "rise_constraint cnst_ctin_rtin_10x10": { | |
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| 0.02, | |
| 0.1648, | |
| 0.6731, | |
| 1.644, | |
| 3.156, | |
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| 8.07, | |
| 11.59, | |
| 15.88, | |
| 21 | |
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| 3.156, | |
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| 15.88, | |
| 21 | |
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| "values": [ | |
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| 8.763, | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| [ | |
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| ] | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin E": { | |
| "capacitance": "0.006432", | |
| "clock": "true", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "21", | |
| "min_pulse_width_high": "4.801", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
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