| { |
| "cell gf180mcu_fd_sc_mcu7t5v0__latsnq_4": { |
| "area": "61.465600", |
| "latch IQ2,IQN2": { |
| "enable": "E", |
| "data_in": "D", |
| "preset": "(!SETN)" |
| }, |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&!SETN", |
| "value": "3.408804e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&SETN", |
| "value": "4.764582e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&!SETN", |
| "value": "3.47976e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&SETN", |
| "value": "3.789666e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&!SETN", |
| "value": "3.408804e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&SETN", |
| "value": "5.784858e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&!SETN", |
| "value": "3.419172e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&SETN", |
| "value": "3.692466e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "5.784858e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin D": { |
| "capacitance": "0.002466", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
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| { |
| "when": "!E&!SETN", |
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| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
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| 0.001288 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
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| 1.644, |
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| 5.278, |
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| -0.00137 |
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| } |
| }, |
| { |
| "when": "!E&SETN", |
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| 0.6731, |
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| 5.278, |
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| 15.88, |
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| 0.001621, |
| 0.001621, |
| 0.001369 |
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| }, |
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| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| -0.001504, |
| -0.001505, |
| -0.00137 |
| ] |
| } |
| }, |
| { |
| "when": "E&!SETN", |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| ], |
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| 0.0154, |
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| 0.01529, |
| 0.01526, |
| 0.01523, |
| 0.01521, |
| 0.01516, |
| 0.009712 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| 0.00429, |
| 0.004257, |
| 0.004223, |
| 0.00419, |
| 0.00427 |
| ] |
| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_SETN === 1'b1", |
| "timing_type": "hold_falling", |
| "when": "SETN", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
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| -3.381, |
| -3.111, |
| -2.6, |
| -1.921, |
| -1.067, |
| -0.277, |
| 0.805, |
| 2.036, |
| 3.42 |
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| [ |
| -3.523, |
| -3.447, |
| -3.173, |
| -2.665, |
| -1.984, |
| -1.136, |
| -0.329, |
| 0.765, |
| 2, |
| 3.386 |
| ], |
| [ |
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| -3.71, |
| -3.437, |
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| -2.24, |
| -1.429, |
| -0.616, |
| 0.501, |
| 1.741, |
| 3.126 |
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| [ |
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| -4.188, |
| -3.91, |
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| -1.125, |
| -0.004, |
| 1.253, |
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| [ |
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| 0.517, |
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| [ |
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| [ |
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| -5.765, |
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| [ |
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| -3.427, |
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| [ |
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| -10.48, |
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| ], |
| [ |
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| -12.14, |
| -11.44, |
| -10.61, |
| -9.674, |
| -8.6, |
| -7.36, |
| -5.912 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| ], |
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| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| [ |
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| [ |
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| -5.472, |
| -6.227 |
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| [ |
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| -3.011, |
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| [ |
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| [ |
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| [ |
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| [ |
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| -7.782, |
| -8.416, |
| -9.094 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_SETN === 1'b1", |
| "timing_type": "setup_falling", |
| "when": "SETN", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| 4.025, |
| 3.955, |
| 3.704, |
| 3.197, |
| 2.478, |
| 1.641, |
| 0.983, |
| 0.454, |
| -0.284, |
| -1.199 |
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| [ |
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| 4.016, |
| 3.757, |
| 3.258, |
| 2.539, |
| 1.711, |
| 1.047, |
| 0.474, |
| -0.404, |
| -1.414 |
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| [ |
| 4.338, |
| 4.269, |
| 4.011, |
| 3.504, |
| 2.797, |
| 2.034, |
| 1.34, |
| 0.79, |
| -0.145, |
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| ], |
| [ |
| 4.797, |
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| 4.461, |
| 3.956, |
| 3.257, |
| 2.562, |
| 1.845, |
| 1.309, |
| 0.456, |
| -0.707 |
| ], |
| [ |
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| 5.413, |
| 5.149, |
| 4.644, |
| 3.947, |
| 3.281, |
| 2.577, |
| 1.97, |
| 1.197, |
| 0.046 |
| ], |
| [ |
| 6.45, |
| 6.376, |
| 6.111, |
| 5.6, |
| 4.921, |
| 4.261, |
| 3.584, |
| 2.852, |
| 2.057, |
| 0.967 |
| ], |
| [ |
| 7.722, |
| 7.65, |
| 7.38, |
| 6.874, |
| 6.217, |
| 5.534, |
| 4.845, |
| 4.045, |
| 3.16, |
| 2.074 |
| ], |
| [ |
| 9.32, |
| 9.236, |
| 8.971, |
| 8.482, |
| 7.827, |
| 7.123, |
| 6.386, |
| 5.576, |
| 4.589, |
| 3.469 |
| ], |
| [ |
| 11.2, |
| 11.12, |
| 10.86, |
| 10.37, |
| 9.712, |
| 8.991, |
| 8.213, |
| 7.364, |
| 6.343, |
| 5.144 |
| ], |
| [ |
| 13.33, |
| 13.26, |
| 12.99, |
| 12.52, |
| 11.85, |
| 11.1, |
| 10.29, |
| 9.39, |
| 8.373, |
| 7.12 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "index_2": [ |
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| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
| "values": [ |
| [ |
| 1.826, |
| 1.794, |
| 1.808, |
| 1.958, |
| 2.406, |
| 3.284, |
| 4.596, |
| 6.277, |
| 8.346, |
| 10.81 |
| ], |
| [ |
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| 1.864, |
| 2.014, |
| 2.463, |
| 3.343, |
| 4.653, |
| 6.326, |
| 8.389, |
| 10.84 |
| ], |
| [ |
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| 2.047, |
| 2.191, |
| 2.644, |
| 3.512, |
| 4.797, |
| 6.456, |
| 8.489, |
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| [ |
| 2.401, |
| 2.37, |
| 2.373, |
| 2.532, |
| 2.978, |
| 3.825, |
| 5.066, |
| 6.671, |
| 8.645, |
| 11 |
| ], |
| [ |
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| 2.874, |
| 2.884, |
| 3.036, |
| 3.461, |
| 4.244, |
| 5.412, |
| 6.948, |
| 8.843, |
| 11.12 |
| ], |
| [ |
| 3.522, |
| 3.493, |
| 3.503, |
| 3.654, |
| 4.04, |
| 4.756, |
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| 7.3, |
| 9.112, |
| 11.29 |
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| [ |
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| 4.696, |
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| [ |
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| 5.097, |
| 5.409, |
| 6, |
| 6.911, |
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| [ |
| 5.797, |
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| [ |
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| 7.016, |
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| 8.283, |
| 9.39, |
| 10.84, |
| 12.63 |
| ] |
| ] |
| } |
| } |
| ] |
| }, |
| "pin E": { |
| "capacitance": "0.006125", |
| "clock": "true", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "min_pulse_width_high": "4.353", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!D&!SETN", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.01314 |
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| } |
| }, |
| { |
| "when": "!D&SETN", |
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| "rise_power pwr_tin_10": { |
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| -2.579, |
| -2.035, |
| -1.19, |
| -0.096, |
| 1.188, |
| 2.663, |
| 4.343, |
| 6.218 |
| ], |
| [ |
| -3.769, |
| -3.693, |
| -3.409, |
| -2.854, |
| -2.014, |
| -0.923, |
| 0.355, |
| 1.833, |
| 3.506, |
| 5.387 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "SETN", |
| "sdf_cond": "ENABLE_NOT_D_AND_NOT_E === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "!D&!E", |
| "fall_constraint scalar": { |
| "values": [ |
| 1.949 |
| ] |
| } |
| }, |
| { |
| "related_pin": "SETN", |
| "sdf_cond": "ENABLE_D_AND_NOT_E === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "D&!E", |
| "fall_constraint scalar": { |
| "values": [ |
| 1.949 |
| ] |
| } |
| } |
| ] |
| } |
| } |
| } |
