{ | |
"cell gf180mcu_fd_sc_mcu7t5v0__xnor3_1": { | |
"area": "52.684800", | |
"leakage_power ": [ | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!A1&!A2&!A3", | |
"value": "2.706534e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!A1&!A2&A3", | |
"value": "2.72889e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!A1&A2&!A3", | |
"value": "2.65032e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "!A1&A2&A3", | |
"value": "2.799036e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "A1&!A2&!A3", | |
"value": "3.178602e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "A1&!A2&A3", | |
"value": "3.327318e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "A1&A2&!A3", | |
"value": "2.123496e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"when": "A1&A2&A3", | |
"value": "2.146014e-05" | |
}, | |
{ | |
"related_pg_pin": "VDD", | |
"value": "3.327318e-05" | |
} | |
], | |
"pg_pin VDD": { | |
"voltage_name": "VDD", | |
"pg_type": "primary_power" | |
}, | |
"pg_pin VSS": { | |
"voltage_name": "VSS", | |
"pg_type": "primary_ground" | |
}, | |
"pin A1": { | |
"capacitance": "0.004592", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "21", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD" | |
}, | |
"pin A2": { | |
"capacitance": "0.004845", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "21", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD" | |
}, | |
"pin A3": { | |
"capacitance": "0.005836", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "21", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD" | |
}, | |
"pin ZN": { | |
"direction": "output", | |
"function": "(!(A1^A2^A3))", | |
"max_capacitance": "0.06662", | |
"max_transition": "21", | |
"min_capacitance": "0.001", | |
"output_voltage": "default", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"related_pin": "A1", | |
"when": "!A2&!A3", | |
"fall_power pwr_tin_oload_10x10": { | |
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0.1648, | |
0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.003043, | |
0.006079, | |
0.01081, | |
0.01744, | |
0.02618, | |
0.03718, | |
0.05061, | |
0.06662 | |
], | |
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[ | |
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[ | |
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0.0269, | |
0.02611, | |
0.0255, | |
0.02503, | |
0.02465 | |
] | |
] | |
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"rise_power pwr_tin_oload_10x10": { | |
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0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.006079, | |
0.01081, | |
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0.02618, | |
0.03718, | |
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0.06662 | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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] | |
] | |
} | |
}, | |
{ | |
"related_pin": "A1", | |
"when": "!A2&A3", | |
"fall_power pwr_tin_oload_10x10": { | |
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0.1648, | |
0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.02618, | |
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"rise_power pwr_tin_oload_10x10": { | |
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0.1648, | |
0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.006079, | |
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[ | |
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[ | |
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[ | |
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[ | |
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[ | |
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0.04501, | |
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0.04698, | |
0.04771 | |
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} | |
}, | |
{ | |
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"when": "A2&!A3", | |
"fall_power pwr_tin_oload_10x10": { | |
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0.1648, | |
0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.007851 | |
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}, | |
"rise_power pwr_tin_oload_10x10": { | |
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0.1648, | |
0.6731, | |
1.644, | |
3.156, | |
5.278, | |
8.07, | |
11.59, | |
15.88, | |
21 | |
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0.03718, | |
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