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| }, |
| { |
| "when": "A2&B1&B2&C", |
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| 0.02, |
| 0.05575, |
| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
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| "values": [ |
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| 0.01379, |
| 0.01378, |
| 0.01379, |
| 0.01381, |
| 0.0138, |
| 0.01379, |
| 0.01378 |
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| }, |
| "rise_power pwr_tin_10": { |
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| -0.006168, |
| -0.006174, |
| -0.006166 |
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| } |
| } |
| ] |
| }, |
| "pin A2": { |
| "capacitance": "0.004589", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "5.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
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| 0.02233, |
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| "rise_power pwr_tin_10": { |
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| }, |
| { |
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| 0.02236, |
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| "rise_power pwr_tin_10": { |
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| }, |
| { |
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| 0.02232, |
| 0.02233 |
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| "rise_power pwr_tin_10": { |
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| { |
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| "rise_power pwr_tin_10": { |
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| }, |
| { |
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| "rise_power pwr_tin_10": { |
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| }, |
| { |
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| 0.02238, |
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| "rise_power pwr_tin_10": { |
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| 1.318, |
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| -0.02205, |
| -0.02207, |
| -0.02207 |
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| } |
| }, |
| { |
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| 0.05575, |
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| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
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| 0.02251, |
| 0.02249, |
| 0.0225, |
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| 0.02245, |
| 0.02242 |
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| "rise_power pwr_tin_10": { |
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| }, |
| { |
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| 0.02241, |
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| 0.02239, |
| 0.02239, |
| 0.02237, |
| 0.02236 |
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| }, |
| "rise_power pwr_tin_10": { |
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| -0.02207 |
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| }, |
| { |
| "when": "A1&!B1&B2&C", |
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| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
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| 0.01998, |
| 0.01996, |
| 0.01995, |
| 0.01993 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.05575, |
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| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
| ], |
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| -0.01953, |
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| -0.01966, |
| -0.01966, |
| -0.01968 |
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| } |
| }, |
| { |
| "when": "A1&B1&!B2&!C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
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| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
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| 0.0224, |
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| 0.02238, |
| 0.02237 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
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| 1.318, |
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| 2.876, |
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| -0.02207, |
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| -0.02208 |
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| } |
| }, |
| { |
| "when": "A1&B1&!B2&C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
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| 0.4209, |
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| 1.318, |
| 2.008, |
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| 5.2 |
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| 0.01995, |
| 0.01995, |
| 0.01993 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.05575, |
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| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
| ], |
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| -0.01966, |
| -0.01969 |
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| } |
| }, |
| { |
| "when": "A1&B1&B2&!C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.05575, |
| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
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| 0.02241, |
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| 0.02238, |
| 0.02238, |
| 0.02236 |
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| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.05575, |
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| 1.318, |
| 2.008, |
| 2.876, |
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| -0.02208, |
| -0.02208, |
| -0.02208 |
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| } |
| }, |
| { |
| "when": "A1&B1&B2&C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.05575, |
| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
| ], |
| "values": [ |
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| 0.01987, |
| 0.01989, |
| 0.01988, |
| 0.01993, |
| 0.01993, |
| 0.01997, |
| 0.01996, |
| 0.01996 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.05575, |
| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
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| "values": [ |
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| -0.01954, |
| -0.01965, |
| -0.01965, |
| -0.01968, |
| -0.0197 |
| ] |
| } |
| } |
| ] |
| }, |
| "pin B1": { |
| "capacitance": "0.004944", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "5.2", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!A1&!A2&!B2&!C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.05575, |
| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
| ], |
| "values": [ |
| 0.02022, |
| 0.02022, |
| 0.02014, |
| 0.02005, |
| 0.02, |
| 0.01996, |
| 0.01997, |
| 0.01998, |
| 0.01998, |
| 0.01998 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
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| -0.01993, |
| -0.01994, |
| -0.01993 |
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| } |
| }, |
| { |
| "when": "!A1&!A2&!B2&C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.05575, |
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| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
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| "values": [ |
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| 0.0202, |
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| 0.02009, |
| 0.02001, |
| 0.02, |
| 0.02, |
| 0.02, |
| 0.01997, |
| 0.01998 |
| ] |
| }, |
| "rise_power pwr_tin_10": { |
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| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
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| "values": [ |
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| } |
| }, |
| { |
| "when": "!A1&!A2&B2&!C", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
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| 0.1813, |
| 0.4209, |
| 0.7943, |
| 1.318, |
| 2.008, |
| 2.876, |
| 3.936, |
| 5.2 |
| ], |
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| ] |
| }, |
| "pin ZN": { |
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| "function": "(((!A1)&(!A2))|((!B1)&(!B2))|(!C))", |
| "max_capacitance": "0.1862", |
| "max_transition": "5.2", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
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| "related_power_pin": "VDD", |
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| { |
| "related_pin": "A1", |
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| "fall_transition tmg_ntin_oload_10x10": { |
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| "rise_transition tmg_ntin_oload_10x10": { |
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| 0.02, |
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| [ |
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| }, |
| { |
| "related_pin": "B1", |
| "sdf_cond": "A1===1'b0 && A2===1'b1", |
| "timing_sense": "negative_unate", |
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| { |
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