| { |
| "cell gf180mcu_fd_sc_mcu7t5v0__latrsnq_2": { |
| "area": "54.880000", |
| "latch IQ2,IQN2": { |
| "enable": "E", |
| "data_in": "D", |
| "clear": "(!RN)", |
| "preset": "(!SETN)", |
| "clear_preset_var1": "H", |
| "clear_preset_var2": "L" |
| }, |
| "leakage_power ": [ |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&!RN&!SETN", |
| "value": "2.951964e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&!RN&SETN", |
| "value": "2.963628e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&RN&!SETN", |
| "value": "2.880846e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&!E&RN&SETN", |
| "value": "3.936762e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&!RN&!SETN", |
| "value": "2.680614e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&!RN&SETN", |
| "value": "2.973996e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&RN&!SETN", |
| "value": "2.680614e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "!D&E&RN&SETN", |
| "value": "2.973996e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&!RN&!SETN", |
| "value": "2.951964e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&!RN&SETN", |
| "value": "2.963628e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&RN&!SETN", |
| "value": "2.880846e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&!E&RN&SETN", |
| "value": "4.781916e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&!RN&!SETN", |
| "value": "2.96217e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&!RN&SETN", |
| "value": "3.255552e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&RN&!SETN", |
| "value": "2.891214e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "when": "D&E&RN&SETN", |
| "value": "3.176334e-05" |
| }, |
| { |
| "related_pg_pin": "VDD", |
| "value": "4.781916e-05" |
| } |
| ], |
| "pg_pin VDD": { |
| "voltage_name": "VDD", |
| "pg_type": "primary_power" |
| }, |
| "pg_pin VSS": { |
| "voltage_name": "VSS", |
| "pg_type": "primary_ground" |
| }, |
| "pin D": { |
| "capacitance": "0.002633", |
| "direction": "input", |
| "driver_waveform_rise": "driver_waveform_default_rise", |
| "driver_waveform_fall": "driver_waveform_default_fall", |
| "input_voltage": "default", |
| "max_transition": "21", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "when": "!E&!RN&!SETN", |
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| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
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| } |
| }, |
| { |
| "when": "!E&!RN&SETN", |
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| { |
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| 0.6731, |
| 1.644, |
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| { |
| "when": "!E&RN&SETN", |
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| }, |
| { |
| "when": "E&!RN&!SETN", |
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| -0.001404 |
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| } |
| }, |
| { |
| "when": "E&!RN&SETN", |
| "fall_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
| ], |
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| -0.001404 |
| ] |
| } |
| }, |
| { |
| "when": "E&RN&!SETN", |
| "fall_power pwr_tin_10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
| 21 |
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| 0.01873, |
| 0.01859, |
| 0.01043 |
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| "rise_power pwr_tin_10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| 0.004109, |
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| 0.004042, |
| 0.004116 |
| ] |
| } |
| } |
| ], |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_RN_AND_SETN === 1'b1", |
| "timing_type": "hold_falling", |
| "when": "RN&SETN", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
| "index_1": [ |
| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
| 11.59, |
| 15.88, |
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| 15.88, |
| 21 |
| ], |
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| 1.601, |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| [ |
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| -11.18, |
| -10.22, |
| -9.13, |
| -7.888, |
| -6.438 |
| ] |
| ] |
| }, |
| "rise_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
| 5.278, |
| 8.07, |
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| 21 |
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| [ |
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| -10.54 |
| ] |
| ] |
| } |
| }, |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_RN_AND_SETN === 1'b1", |
| "timing_type": "setup_falling", |
| "when": "RN&SETN", |
| "fall_constraint cnst_ctin_rtin_10x10": { |
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| 0.02, |
| 0.1648, |
| 0.6731, |
| 1.644, |
| 3.156, |
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| [ |
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| [ |
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| [ |
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| [ |
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| 13.18, |
| 12.5, |
| 11.74, |
| 10.9, |
| 9.996, |
| 8.982, |
| 7.758 |
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| { |
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| ], |
| "timing ": [ |
| { |
| "related_pin": "E", |
| "sdf_cond": "ENABLE_NOT_D_AND_RN_AND_SETN === 1'b1", |
| "timing_type": "min_pulse_width", |
| "when": "!D&RN&SETN", |
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| { |
| "related_pin": "E", |
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| "rise_constraint scalar": { |
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| ] |
| }, |
| "pin Q": { |
| "direction": "output", |
| "function": "IQ2", |
| "max_capacitance": "0.3321", |
| "max_transition": "21", |
| "min_capacitance": "0.001", |
| "output_voltage": "default", |
| "related_ground_pin": "VSS", |
| "related_power_pin": "VDD", |
| "internal_power ": [ |
| { |
| "related_pin": "D", |
| "when": "E&RN&SETN", |
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| } |
