{ | |
"cell gf180mcu_fd_sc_mcu7t5v0__oai32_2": { | |
"area": "50.489600", | |
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{ | |
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"value": "0.0001215" | |
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{ | |
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"value": "0.0002685105" | |
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{ | |
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"value": "0.0002685105" | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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{ | |
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"value": "0.00012537" | |
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{ | |
"related_pg_pin": "VDD", | |
"value": "0.000284049" | |
} | |
], | |
"pg_pin VDD": { | |
"voltage_name": "VDD", | |
"pg_type": "primary_power" | |
}, | |
"pg_pin VSS": { | |
"voltage_name": "VSS", | |
"pg_type": "primary_ground" | |
}, | |
"pin A1": { | |
"capacitance": "0.008907", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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5 | |
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{ | |
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5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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5 | |
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5 | |
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{ | |
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} | |
}, | |
{ | |
"when": "A2&A3&B1&B2", | |
"fall_power pwr_tin_10": { | |
"index_1": [ | |
0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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0.03953, | |
0.03942, | |
0.0394, | |
0.03946, | |
0.0394, | |
0.03943, | |
0.03946, | |
0.03942, | |
0.03939 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
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3.785, | |
5 | |
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-0.01751, | |
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] | |
} | |
} | |
] | |
}, | |
"pin A2": { | |
"capacitance": "0.00972", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"when": "!A1&!A3&!B1&!B2", | |
"fall_power pwr_tin_10": { | |
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0.4054, | |
0.7644, | |
1.268, | |
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5 | |
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0.05566, | |
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0.05566 | |
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}, | |
"rise_power pwr_tin_10": { | |
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{ | |
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0.05566, | |
0.05564 | |
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0.7644, | |
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}, | |
{ | |
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0.7644, | |
1.268, | |
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5 | |
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0.03752, | |
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0.0375, | |
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0.7644, | |
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{ | |
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5 | |
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"rise_power pwr_tin_10": { | |
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1.268, | |
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5 | |
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] | |
} | |
}, | |
{ | |
"when": "!A1&A3&B1&B2", | |
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0.05437, | |
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0.4054, | |
0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
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0.03753, | |
0.03756, | |
0.03762, | |
0.0375, | |
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0.03757, | |
0.03753, | |
0.03748 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.4054, | |
0.7644, | |
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5 | |
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] | |
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}, | |
{ | |
"when": "A1&!A3&!B1&!B2", | |
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0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.05563, | |
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0.0555, | |
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] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.05437, | |
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0.4054, | |
0.7644, | |
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3.785, | |
5 | |
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] | |
} | |
}, | |
{ | |
"when": "A1&!A3&!B1&B2", | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.05549, | |
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0.05552, | |
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0.05561 | |
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"rise_power pwr_tin_10": { | |
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0.7644, | |
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5 | |
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] | |
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{ | |
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0.05437, | |
0.175, | |
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0.7644, | |
1.268, | |
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3.785, | |
5 | |
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0.05555, | |
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0.05565, | |
0.05566, | |
0.05565 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
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-0.0548 | |
] | |
} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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0.05567, | |
0.05561, | |
0.05545, | |
0.05557, | |
0.05548, | |
0.05564, | |
0.05566, | |
0.05565, | |
0.05559 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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-0.04824, | |
-0.05246, | |
-0.05369, | |
-0.05426, | |
-0.05436, | |
-0.05458, | |
-0.05465, | |
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-0.05481 | |
] | |
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}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03407, | |
0.0341, | |
0.0341, | |
0.03419, | |
0.03411, | |
0.03418, | |
0.03417, | |
0.03421, | |
0.0342 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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-0.05021, | |
-0.05022, | |
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-0.05027, | |
-0.05013, | |
-0.05026, | |
-0.05025, | |
-0.0502, | |
-0.05017 | |
] | |
} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03404, | |
0.03412, | |
0.03406, | |
0.03418, | |
0.0341, | |
0.03421, | |
0.03421, | |
0.0342, | |
0.03421 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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-0.03451, | |
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-0.03374 | |
] | |
} | |
}, | |
{ | |
"when": "A1&A3&B1&!B2", | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03404, | |
0.03412, | |
0.03405, | |
0.03419, | |
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0.03421, | |
0.03422, | |
0.0342, | |
0.03423 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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-0.03893, | |
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-0.03587, | |
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-0.03413, | |
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] | |
} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.03404, | |
0.03408, | |
0.03404, | |
0.03417, | |
0.0341, | |
0.03422, | |
0.03424, | |
0.03418, | |
0.0342 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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-0.03416, | |
-0.03392, | |
-0.03375 | |
] | |
} | |
} | |
] | |
}, | |
"pin A3": { | |
"capacitance": "0.01008", | |
"direction": "input", | |
"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"when": "!A1&!A2&!B1&!B2", | |
"fall_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
"values": [ | |
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0.0558, | |
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0.05551, | |
0.05561, | |
0.0557, | |
0.05572, | |
0.05567 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
], | |
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] | |
} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
], | |
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0.0556, | |
0.05547, | |
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0.05567, | |
0.05559, | |
0.05568 | |
] | |
}, | |
"rise_power pwr_tin_10": { | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
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2.766, | |
3.785, | |
5 | |
], | |
"values": [ | |
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} | |
}, | |
{ | |
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0.02, | |
0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
1.268, | |
1.931, | |
2.766, | |
3.785, | |
5 | |
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"driver_waveform_rise": "driver_waveform_default_rise", | |
"driver_waveform_fall": "driver_waveform_default_fall", | |
"input_voltage": "default", | |
"max_transition": "5", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
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{ | |
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5 | |
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5 | |
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3.785, | |
5 | |
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} | |
] | |
}, | |
"pin ZN": { | |
"direction": "output", | |
"function": "(((!A1)&(!A2)&(!A3))|((!B1)&(!B2)))", | |
"max_capacitance": "0.147", | |
"max_transition": "5", | |
"min_capacitance": "0.001", | |
"output_voltage": "default", | |
"related_ground_pin": "VSS", | |
"related_power_pin": "VDD", | |
"internal_power ": [ | |
{ | |
"related_pin": "A1", | |
"when": "!A2&!A3&!B1&B2", | |
"fall_power pwr_tin_oload_10x10": { | |
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0.05437, | |
0.175, | |
0.4054, | |
0.7644, | |
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1.931, | |
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3.785, | |
5 | |
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