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| }, | |
| "pin A3": { | |
| "capacitance": "0.009501", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "5.2", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
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| { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| "rise_power pwr_tin_10": { | |
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| } | |
| } | |
| ] | |
| }, | |
| "pin B1": { | |
| "capacitance": "0.008715", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "5.2", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!A2&!A3&!B2", | |
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| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.03591, | |
| 0.03595, | |
| 0.03592 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| -0.03029, | |
| -0.03277, | |
| -0.03466, | |
| -0.03493, | |
| -0.03518, | |
| -0.03522, | |
| -0.03537, | |
| -0.03542, | |
| -0.03545, | |
| -0.03547 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&!A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| 0.03581, | |
| 0.03584, | |
| 0.03574, | |
| 0.03588, | |
| 0.03586, | |
| 0.03586, | |
| 0.03597, | |
| 0.03592, | |
| 0.03596, | |
| 0.03593 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| -0.03031, | |
| -0.03277, | |
| -0.03462, | |
| -0.03493, | |
| -0.03514, | |
| -0.03521, | |
| -0.03539, | |
| -0.03541, | |
| -0.03546, | |
| -0.03547 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "A1&A2&A3&B1", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| 0.03582, | |
| 0.03582, | |
| 0.03573, | |
| 0.03577, | |
| 0.03581, | |
| 0.03595, | |
| 0.03593, | |
| 0.03593, | |
| 0.03593, | |
| 0.03593 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| -0.03028, | |
| -0.03273, | |
| -0.03465, | |
| -0.03496, | |
| -0.03513, | |
| -0.03519, | |
| -0.03535, | |
| -0.03541, | |
| -0.03546, | |
| -0.03547 | |
| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin ZN": { | |
| "direction": "output", | |
| "function": "(((!A1)&(!A2)&(!A3))|((!B1)&(!B2)))", | |
| "max_capacitance": "0.2195", | |
| "max_transition": "5.2", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "A1", | |
| "when": "!A2&!A3&!B1&B2", | |
| "fall_power pwr_tin_oload_10x10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |