| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__oai22_4": { | |
| "area": "76.832000", | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&!B1&!B2", | |
| "value": "0.0001297188" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0001297296" | |
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| { | |
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| "value": "0.0001297296" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0001297296" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0002887848" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&!B1&B2", | |
| "value": "0.0002771892" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&B1&!B2", | |
| "value": "0.0002067876" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&B1&B2", | |
| "value": "0.0002067876" | |
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| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0002887848" | |
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| { | |
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| "value": "0.0002067876" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&B1&!B2", | |
| "value": "0.000136386" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0001363824" | |
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| { | |
| "related_pg_pin": "VDD", | |
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| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&!B1&B2", | |
| "value": "0.000206784" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0001363824" | |
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| { | |
| "related_pg_pin": "VDD", | |
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| "value": "0.0001363824" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.0002896632" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin A1": { | |
| "capacitance": "0.01823", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "5.2", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A2&!B1&!B2", | |
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| 1.318, | |
| 2.008, | |
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| }, | |
| { | |
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| 0.0831, | |
| 0.083, | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
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| "rise_power pwr_tin_10": { | |
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| { | |
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| 1.318, | |
| 2.008, | |
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| 0.05865 | |
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| "rise_power pwr_tin_10": { | |
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| }, | |
| { | |
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| 1.318, | |
| 2.008, | |
| 2.876, | |
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| 0.05869, | |
| 0.05868 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
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| } | |
| } | |
| ] | |
| }, | |
| "pin A2": { | |
| "capacitance": "0.01815", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "5.2", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.05575, | |
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| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
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| ], | |
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| 0.08124, | |
| 0.08111, | |
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| 0.08131, | |
| 0.08132, | |
| 0.08134 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 2.876, | |
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| 0.0518, | |
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| 0.0514 | |
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| } | |
| }, | |
| { | |
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| "fall_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
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| 0.08314, | |
| 0.08313, | |
| 0.08306, | |
| 0.08297 | |
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| "rise_power pwr_tin_10": { | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
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| }, | |
| { | |
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| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.05575, | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
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| "values": [ | |
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| 0.07188 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| } | |
| }, | |
| { | |
| "when": "A1&B1&!B2", | |
| "fall_power pwr_tin_10": { | |
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| 2.876, | |
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| 5.2 | |
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| "values": [ | |
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| 0.07188 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.7943, | |
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| } | |
| }, | |
| { | |
| "when": "A1&B1&B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
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| 0.07182, | |
| 0.07182, | |
| 0.07185, | |
| 0.07185 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.05575, | |
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| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin B1": { | |
| "capacitance": "0.01796", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "5.2", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!A2&!B2", | |
| "fall_power pwr_tin_10": { | |
| "index_1": [ | |
| 0.02, | |
| 0.05575, | |
| 0.1813, | |
| 0.4209, | |
| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
| ], | |
| "values": [ | |
| 0.07557, | |
| 0.07247, | |
| 0.07216, | |
| 0.07196, | |
| 0.07179, | |
| 0.07181, | |
| 0.07184, | |
| 0.07187, | |
| 0.07188, | |
| 0.07187 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.05575, | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
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| ] | |
| } | |
| }, | |
| { | |
| "when": "!A1&!A2&B2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.05575, | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
| 5.2 | |
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| 0.0718, | |
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| 0.07186, | |
| 0.07186, | |
| 0.07185 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
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| 0.7943, | |
| 1.318, | |
| 2.008, | |
| 2.876, | |
| 3.936, | |
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| } | |
| }, | |
| { | |
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