| { | |
| "cell gf180mcu_fd_sc_mcu7t5v0__aoi21_1": { | |
| "area": "17.561600", | |
| "leakage_power ": [ | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&!B", | |
| "value": "0.002374164" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&!A2&B", | |
| "value": "0.000655704" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&!B", | |
| "value": "0.00374328" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "!A1&A2&B", | |
| "value": "0.000656748" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&!B", | |
| "value": "0.003462408" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&!A2&B", | |
| "value": "0.000656748" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&!B", | |
| "value": "0.000673524" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "when": "A1&A2&B", | |
| "value": "0.000609192" | |
| }, | |
| { | |
| "related_pg_pin": "VDD", | |
| "value": "0.00374328" | |
| } | |
| ], | |
| "pg_pin VDD": { | |
| "voltage_name": "VDD", | |
| "pg_type": "primary_power" | |
| }, | |
| "pg_pin VSS": { | |
| "voltage_name": "VSS", | |
| "pg_type": "primary_ground" | |
| }, | |
| "pin A1": { | |
| "capacitance": "0.004801", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7.4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A2&!B", | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
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| 7.4 | |
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| 0.02292, | |
| 0.0229 | |
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| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.07094, | |
| 0.2497, | |
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| 1.87, | |
| 2.852, | |
| 4.089, | |
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| } | |
| }, | |
| { | |
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| 0.07094, | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
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| 0.005591, | |
| 0.005594, | |
| 0.005595 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
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| } | |
| }, | |
| { | |
| "when": "A2&B", | |
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| 0.07094, | |
| 0.2497, | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
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| 0.02505, | |
| 0.02501, | |
| 0.025, | |
| 0.025, | |
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| 0.02495, | |
| 0.02493, | |
| 0.02487 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
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| 1.87, | |
| 2.852, | |
| 4.089, | |
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| "values": [ | |
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| ] | |
| } | |
| } | |
| ] | |
| }, | |
| "pin A2": { | |
| "capacitance": "0.004703", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7.4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "when": "!A1&!B", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
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| 0.02083, | |
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| 0.02067, | |
| 0.02059, | |
| 0.02054, | |
| 0.0205 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
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| -0.02051 | |
| ] | |
| } | |
| }, | |
| { | |
| "when": "!A1&B", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
| 0.5912, | |
| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
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| 0.005594, | |
| 0.005596, | |
| 0.005596 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| 0.07094, | |
| 0.2497, | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
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| ], | |
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| -0.005635 | |
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| } | |
| }, | |
| { | |
| "when": "A1&B", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
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| 1.123, | |
| 1.87, | |
| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
| ], | |
| "values": [ | |
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| 0.025, | |
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| 0.02496, | |
| 0.02493, | |
| 0.02487 | |
| ] | |
| }, | |
| "rise_power pwr_tin_10": { | |
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| } | |
| } | |
| ] | |
| }, | |
| "pin B": { | |
| "capacitance": "0.003998", | |
| "direction": "input", | |
| "driver_waveform_rise": "driver_waveform_default_rise", | |
| "driver_waveform_fall": "driver_waveform_default_fall", | |
| "input_voltage": "default", | |
| "max_transition": "7.4", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": { | |
| "when": "A1&A2", | |
| "fall_power pwr_tin_10": { | |
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| 0.02, | |
| 0.07094, | |
| 0.2497, | |
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| 1.123, | |
| 1.87, | |
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| 4.089, | |
| 5.6, | |
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| "values": [ | |
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| 0.02088, | |
| 0.02087, | |
| 0.02087 | |
| ] | |
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| "rise_power pwr_tin_10": { | |
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| ] | |
| } | |
| } | |
| }, | |
| "pin ZN": { | |
| "direction": "output", | |
| "function": "(((!A1)&(!B))|((!A2)&(!B)))", | |
| "max_capacitance": "0.1773", | |
| "max_transition": "7.4", | |
| "min_capacitance": "0.001", | |
| "output_voltage": "default", | |
| "related_ground_pin": "VSS", | |
| "related_power_pin": "VDD", | |
| "internal_power ": [ | |
| { | |
| "related_pin": "A1", | |
| "when": "A2&!B", | |
| "fall_power pwr_tin_oload_10x10": { | |
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| 2.852, | |
| 4.089, | |
| 5.6, | |
| 7.4 | |
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| [ | |
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| [ | |
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| }, | |
| "rise_power pwr_tin_oload_10x10": { | |
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| [ | |
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| [ | |
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| ] | |
| ] | |
| } | |
| }, | |
| { | |
| "related_pin": "A2", | |
| "when": "A1&!B", | |
| "fall_power pwr_tin_oload_10x10": { | |
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| "values": [ | |
| [ | |
| 0.003739, | |
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