# Copyright 2022 GlobalFoundries PDK Authors
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     https://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

#=============================================================================================================================================================
#--------------------------------------------------- GF 0.18um MCU DRC RULE DECK (MIM CAPACITOR OPTION B) ----------------------------------------------------
#=============================================================================================================================================================

require 'time'
require "logger"

exec_start_time = Time.now

logger = Logger.new(STDOUT)

logger.formatter = proc do |severity, datetime, progname, msg|
  "#{datetime}: Memory Usage (" + `pmap #{Process.pid} | tail -1`[10,40].strip + ") : #{msg}
"
end

#================================================
#----------------- FILE SETUP -------------------
#================================================

# optional for a batch launch :   klayout -b -r gf180mcu.drc -rd input=design.gds -rd report=gf180mcu_main.lyrdb

logger.info("Starting running GF180MCU Klayout DRC runset on %s" % [$input])

if $input
    if $topcell
        source($input, $topcell)
    else
        source($input)
    end
end

logger.info("Loading database to memory is complete.")

if $report
    logger.info("GF180MCU Klayout DRC runset output at: %s" % [$report])
    report("DRC Run Report at", $report)
else
    logger.info("GF180MCU Klayout DRC runset output at default location." % [File.join(File.dirname(RBA::CellView::active.filename), "gf180_drc.lyrdb").path])
    report("DRC Run Report at", File.join(File.dirname(RBA::CellView::active.filename), "gf180_drc.lyrdb"))
end

if $thr
    logger.info("Number of threads to use %s" % [$thr])
    threads($thr)
else
    logger.info("Number of threads to use 16")
    threads(16)
end

# === TILING MODE ===
if $run_mode == "tiling"
  # use a tile size of 1mm - not used in deep mode-
  # tiles(500.um)
  # use a tile border of 10 micron:
  # tile_borders(10.um)
  tiles(1000)
  logger.info("Tiling  mode is enabled.")

elsif $run_mode == "deep"
  #=== HIER MODE ===
  deep
  logger.info("deep  mode is enabled.")

elsif $run_mode == "flat"
  #=== FLAT MODE ===
  flat
  logger.info("flat  mode is enabled.")

else
  #=== FLAT MODE ===
  flat
  logger.info("flat  mode is enabled.")

end # run_mode

#================================================
#------------- LAYERS DEFINITIONS ---------------
#================================================

v5_xtor        = polygons(112, 1 )
dualgate       = polygons(55 , 0 )
poly2          = polygons(30 , 0 )
nplus          = polygons(32 , 0 )
pplus          = polygons(31 , 0 )
comp           = polygons(22 , 0 )
fusetop        = polygons(75 , 0 )
cap_mk         = polygons(117, 5 )

logger.info("Starting deriving base layers.")
#================================================
#------------- LAYERS DERIVATIONS ---------------
#================================================

ncomp      =  comp      & nplus
pcomp      =  comp      & pplus
tgate      =  poly2     & comp
ngate      =  nplus     & tgate
pgate      =  pplus     & tgate

#================================================
#------------------ SWITCHES --------------------
#================================================
logger.info("Evaluate switches.")

# FEOL
if $feol == "false"
  FEOL = $feol
  logger.info("FEOL is disabled.")
else
  FEOL = "true"
  logger.info("FEOL is enabled.")
end # FEOL

# BEOL
if $beol == "false"
  BEOL = $beol
  logger.info("BEOL is disabled.")
else
  BEOL = "true"
  logger.info("BEOL is enabled.")
end # BEOL

# connectivity rules
if $conn_drc == "true"
  CONNECTIVITY_RULES = $conn_drc
  logger.info("connectivity rules are enabled.")
else
  CONNECTIVITY_RULES = false
  logger.info("connectivity rules are disabled.")
end # connectivity rules

# METAL_TOP
if $metal_top
  METAL_TOP = $metal_top
else
  METAL_TOP = "9K"
end # METAL_TOP

logger.info("METAL_TOP Selected is %s" % [METAL_TOP])

# METAL_LEVEL
if $metal_level
  METAL_LEVEL = $metal_level
else
  METAL_LEVEL = "6LM"
end # METAL_LEVEL

logger.info("METAL_STACK Selected is %s" % [METAL_LEVEL])

# WEDGE
if $wedge == "false"
  WEDGE = $wedge
else
  WEDGE = "true"
end # WEDGE

logger.info("Wedge enabled  %s" % [WEDGE])

# BALL
if $ball == "false"
  BALL = $ball
else
  BALL = "true"
end # BALL

logger.info("Ball enabled  %s" % [BALL])

# GOLD
if $gold == "false"
  GOLD = $gold
else
  GOLD = "true"
end # GOLD

logger.info("Gold enabled  %s" % [GOLD])

if $mim_option
  MIM_OPTION = $mim_option
else
  MIM_OPTION = "Nan"
end

logger.info("MIM Option selected %s" % [MIM_OPTION])

# OFFGRID
if $offgrid == "false"
  OFFGRID = false
else
  OFFGRID = true
end # OFFGRID

logger.info("Offgrid enabled  %s" % [OFFGRID])

#================================================
#------------- METAL LEVEL SWITCHES -------------
#================================================


if METAL_LEVEL == "6LM"
    via4           = polygons(41 , 0 )
    metal5         = polygons(81 , 0 )
    via5           = polygons(82 , 0 )
    metaltop       = polygons(53 , 0 )
    top_via       = via5
    topmin1_via   = via4
    top_metal     = metaltop
    topmin1_metal = metal5
elsif METAL_LEVEL == "5LM"
    via3           = polygons(40 , 0 )
    metal4         = polygons(46 , 0 )
    via4           = polygons(41 , 0 )
    metal5         = polygons(81 , 0 )
    top_via       = via4
    topmin1_via   = via3
    top_metal     = metal5
    topmin1_metal = metal4
elsif METAL_LEVEL == "4LM"
    via2           = polygons(38 , 0 )
    metal3         = polygons(42 , 0 )
    via3           = polygons(40 , 0 )
    metal4         = polygons(46 , 0 )
    top_via       = via3
    topmin1_via   = via2
    top_metal     = metal4
    topmin1_metal = metal3
elsif METAL_LEVEL == "3LM"
    via1           = polygons(35 , 0 )
    metal2         = polygons(36 , 0 )
    via2           = polygons(38 , 0 )
    metal3         = polygons(42 , 0 )
    top_via       = via2
    topmin1_via   = via1
    top_metal     = metal3
    topmin1_metal = metal2
elsif METAL_LEVEL == "2LM"
    metal1         = polygons(34 , 0 )
    via1           = polygons(35 , 0 )
    metal2         = polygons(36 , 0 )
    top_via       = via1
    topmin1_via   = via1
    top_metal     = metal2
    topmin1_metal = metal1
end #METAL_LEVEL


#================================================
#-------------MIM CAPACITOR OPTION B-------------
#================================================

if MIM_OPTION == "B"
logger.info("mim11_metal2_polygon_layer.interacting(fuse_in_polygon) section")

mimtm_virtual = fusetop.sized(1.06.um).and(topmin1_metal.interacting(fusetop))
# Rule MIMTM.1: Minimum MiM bottom plate spacing to the bottom plate metal (whether adjacent MiM or routing metal). is 1.2µm
logger.info("Executing rule MIMTM.1")
mimtm1_l1 = topmin1_metal.separation(mimtm_virtual ,transparent, 1.2.um).polygons(0.001)
mimtm1_l1.output("MIMTM.1", "MIMTM.1 : Minimum MiM bottom plate spacing to the bottom plate metal (whether adjacent MiM or routing metal). : 1.2µm")
mimtm1_l1.forget

# Rule MIMTM.2: Minimum MiM bottom plate overlap of Vian-1 layer. [This is applicable for Vian-1 within 1.06um oversize of FuseTop layer (referenced to virtual bottom plate)]. is 0.4µm
logger.info("Executing rule MIMTM.2")
mimtm2_l1 = topmin1_metal.enclosing(top_via.overlapping(mimtm_virtual), 0.4.um, euclidian).polygons(0.001)
mimtm2_l2 = top_via.overlapping(mimtm_virtual).not_outside(topmin1_metal).not(topmin1_metal)
mimtm2_l  = mimtm2_l1.or(mimtm2_l2)
mimtm2_l.output("MIMTM.2", "MIMTM.2 : Minimum MiM bottom plate overlap of Vian-1 layer. [This is applicable for Vian-1 within 1.06um oversize of FuseTop layer (referenced to virtual bottom plate)]. : 0.4µm")
mimtm2_l1.forget
mimtm2_l2.forget
mimtm2_l.forget

# Rule MIMTM.3: Minimum MiM bottom plate overlap of Top plate.
logger.info("Executing rule MIMTM.3")
mimtm3_l1 = mimtm_virtual.enclosing(fusetop,0.6.um).polygons(0.001).or(fusetop.not_inside(mimtm_virtual))
mimtm3_l1.output("MIMTM.3", "MIMTM.3 : Minimum MiM bottom plate overlap of Top plate.")
mimtm3_l1.forget

mimtm_virtual.forget
# Rule MIMTM.4: Minimum MiM top plate (FuseTop) overlap of Vian-1. is 0.4µm
logger.info("Executing rule MIMTM.4")
mimtm4_l1 = fusetop.enclosing(top_via, 0.4.um, euclidian).polygons(0.001)
mimtm4_l2 = top_via.not_outside(fusetop).not(fusetop)
mimtm4_l  = mimtm4_l1.or(mimtm4_l2)
mimtm4_l.output("MIMTM.4", "MIMTM.4 : Minimum MiM top plate (FuseTop) overlap of Vian-1. : 0.4µm")
mimtm4_l1.forget
mimtm4_l2.forget
mimtm4_l.forget

# Rule MIMTM.5: Minimum spacing between top plate and the Vian-1 connecting to the bottom plate. is 0.4µm
logger.info("Executing rule MIMTM.5")
mimtm5_l1  = fusetop.separation(top_via.interacting(topmin1_metal), 0.4.um, euclidian).polygons(0.001)
mimtm5_l1.output("MIMTM.5", "MIMTM.5 : Minimum spacing between top plate and the Vian-1 connecting to the bottom plate. : 0.4µm")
mimtm5_l1.forget

# Rule MIMTM.6: Minimum spacing between unrelated top plates. is 0.6µm
logger.info("Executing rule MIMTM.6")
mimtm6_l1  = fusetop.space(0.6.um, euclidian).polygons(0.001)
mimtm6_l1.output("MIMTM.6", "MIMTM.6 : Minimum spacing between unrelated top plates. : 0.6µm")
mimtm6_l1.forget

# Rule MIMTM.7: Min FuseTop enclosure by CAP_MK.
logger.info("Executing rule MIMTM.7")
mimtm7_l1 = fusetop.not_inside(cap_mk)
mimtm7_l1.output("MIMTM.7", "MIMTM.7 : Min FuseTop enclosure by CAP_MK.")
mimtm7_l1.forget

# Rule MIMTM.8a: Minimum MIM cap area (defined by FuseTop area) (um2). is 25µm²
logger.info("Executing rule MIMTM.8a")
mimtm8a_l1  = fusetop.with_area(nil, 25.um)
mimtm8a_l1.output("MIMTM.8a", "MIMTM.8a : Minimum MIM cap area (defined by FuseTop area) (um2). : 25µm²")
mimtm8a_l1.forget
# Rule MIMTM.8b: Maximum single MIM Cap area (Use multiple MIM caps in parallel connection if bigger capacitors are required) (um2). is 10000µm
logger.info("Executing rule MIMTM.8b")
mimtm8b_l1 = fusetop.with_area(10000.um,nil).not_in(fusetop.with_area(10000.um))
mimtm8b_l1.output("MIMTM.8b", "MIMTM.8b : Maximum single MIM Cap area (Use multiple MIM caps in parallel connection if bigger capacitors are required) (um2). : 10000µm")
mimtm8b_l1.forget

# Rule MIMTM.9: Min. Via (Vian-1) spacing for sea of Via on MIM top plate. is 0.5µm
logger.info("Executing rule MIMTM.9")
mimtm9_l1  = top_via.inside(fusetop).space(0.5.um, euclidian).polygons(0.001)
mimtm9_l1.output("MIMTM.9", "MIMTM.9 : Min. Via (Vian-1) spacing for sea of Via on MIM top plate. : 0.5µm")
mimtm9_l1.forget

# Rule MIMTM.10: (a) There cannot be any Vian-2 touching MIM bottom plate Metaln-1. (b) MIM bottom plate Metaln-1 can only be connected through the higher Via (Vian-1).
logger.info("Executing rule MIMTM.10")
mimtm10_l1 = topmin1_via.interacting(topmin1_metal.interacting(fusetop))
mimtm10_l1.output("MIMTM.10", "MIMTM.10 : (a) There cannot be any Vian-2 touching MIM bottom plate Metaln-1. (b) MIM bottom plate Metaln-1 can only be connected through the higher Via (Vian-1).")
mimtm10_l1.forget

mimtm11_large_topmin1_metal = topmin1_metal.interacting(fusetop).with_area(10000, nil)
mimtm11_large_topmin1_metal_violation = polygon_layer
mimtm11_large_topmin1_metal.data.each do |p|
  mimtm11_topmin1_metal_polygon_layer = polygon_layer
  mimtm11_topmin1_metal_polygon_layer.data.insert(p)
  fuse_in_polygon = fusetop.and(mimtm11_topmin1_metal_polygon_layer)
  if(fuse_in_polygon.area > 10000)
    mimtm11_bad_topmin1_metal_polygon = mimtm11_topmin1_metal_polygon_layer.interacting(fuse_in_polygon)
    mimtm11_bad_topmin1_metal_polygon.data.each do |b|
      b.num_points > 0 && mimtm11_large_topmin1_metal_violation.data.insert(b)
    end
  end
end
# Rule MIMTM.11: Bottom plate of multiple MIM caps can be shared (for common nodes) as long as total MIM area with that single common plate does not exceed MIMTM.8b rule. is -µm
logger.info("Executing rule MIMTM.11")
mimtm11_l1  = mimtm11_large_topmin1_metal_violation
mimtm11_l1.output("MIMTM.11", "MIMTM.11 : Bottom plate of multiple MIM caps can be shared (for common nodes) as long as total MIM area with that single common plate does not exceed MIMTM.8b rule. : -µm")
mimtm11_l1.forget

mimtm11_large_topmin1_metal.forget
mimtm11_large_topmin1_metal_violation.forget
# rule MIMTM.12 is not a DRC check

else
logger.info("MIM Capacitor Option B not Selected")

end #MIM_OPTION


exec_end_time = Time.now
run_time = exec_end_time - exec_start_time
logger.info("DRC Run time %f seconds" % [run_time])