Moving IO docs from gf180mcu-pdk
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
diff --git a/docs/analog.rst b/docs/analog.rst
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--- /dev/null
+++ b/docs/analog.rst
@@ -0,0 +1,26 @@
+4.5 Analogue Signal Cells
+=========================
+
+The schematics for a 5.0V analogue signal pad cell is shown in Figure 5.5. The 5.0V analogue signal pad is meant for analogue circuits that use the thick-gate transistors.
+
+.. image:: specs/Analogue_Signal_Cells1.png
+ :width: 600
+ :align: center
+ :alt: Analogue Signal Cells
+
+.. centered::
+ Figure 4.5 Functional schematic of 5V analogue signal pad (b)
+
+.. warning::
+ The analogue signal pads contain only HBM protection diodes. If they are connected to input gates, the designer needs to include CDM protection network near to these gates as shown in Figure 4.6.
+
+.. image:: specs/Analogue_Signal_Cells2.png
+ :width: 600
+ :align: center
+ :alt: Analogue Signal Cells
+
+.. centered::
+ Figure 4.6 Illustration of CDM protection network that may be added to 5V analogue signal pad (b)
+
+If these analog signal pads are used with internal circuit, the user must add their own secondary ESD protection adjacent to the devices of the internal circuit being protected. The perimeter of the CDM diode should be larger than 25µm. The CDM resistor should be larger than 50 and should be realized using appropriate poly resistor.
+
diff --git a/docs/conditions.rst b/docs/conditions.rst
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index 0000000..1caf5c0
--- /dev/null
+++ b/docs/conditions.rst
@@ -0,0 +1,7 @@
+Operating Conditions
+====================
+
+ .. csv-table::
+ :file: specs/15_Operating_Conditions.csv
+
+
diff --git a/docs/corners.rst b/docs/corners.rst
new file mode 100644
index 0000000..aaa8a87
--- /dev/null
+++ b/docs/corners.rst
@@ -0,0 +1,8 @@
+Characterization Corners
+========================
+
+ .. csv-table::
+ :file: specs/21_Characterization_Corners.csv
+
+.. note::
+ \* worst case leakage current
diff --git a/docs/datasheet.rst b/docs/datasheet.rst
new file mode 100644
index 0000000..9ab1d17
--- /dev/null
+++ b/docs/datasheet.rst
@@ -0,0 +1,26 @@
+1.0 Introduction
+================
+
+This document serves as the data sheet for **GlobalFoundries 0.18µm Green (5.0V) Process 5V Wide-Range Inline non-CUP GPIO Library.** This I/O cell library consists of bidirectional and input only I/O pad cells; analogue signal pad cells; I/O supply and ground pad cells; core supply and ground pad cells; corner, filler and breaker pad cells.
+
+1.1 Cell List
+-------------
+
+
+.. csv-table::
+ :file: specs/02_Cell_List.csv
+
+.. note::
+
+ gf180mcu_fd_io__fillnc can't be used as a standalone cell and it must be used with gf180mcu_fd_io__filln (n>=2).
+
+1.2 Device List
+---------------
+
+nmos_6p0, pmos_6p0, pn_6p0, np_6p0, ppolyf_u, nmoscap_6p0, nmos_6p0_sab, pmos_6p0_sab.
+
+1.3 Design Manual
+-----------------
+
+This design is based on :ref:`DESIGN MANUAL`
+
diff --git a/docs/delay_input.rst b/docs/delay_input.rst
new file mode 100644
index 0000000..c44bd48
--- /dev/null
+++ b/docs/delay_input.rst
@@ -0,0 +1,7 @@
+Input Propagation Delay (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
+============================================================================
+
+ .. csv-table::
+ :file: specs/19_Input_Propagation_Delay.csv
+
+
diff --git a/docs/delay_output.rst b/docs/delay_output.rst
new file mode 100644
index 0000000..90caa46
--- /dev/null
+++ b/docs/delay_output.rst
@@ -0,0 +1,6 @@
+Output Propagation Delay (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
+=============================================================================
+
+ .. csv-table::
+ :file: specs/20_Output_Propagation_Delay.csv
+
diff --git a/docs/digital.rst b/docs/digital.rst
new file mode 100644
index 0000000..9767735
--- /dev/null
+++ b/docs/digital.rst
@@ -0,0 +1,18 @@
+4.1 Digital I/O Cell Control Pins
+=================================
+
+.. csv-table::
+ :file: specs/09_Control_Pins1.csv
+
+.. csv-table::
+ :file: specs/09_Control_Pins2.csv
+
+.. csv-table::
+ :file: specs/09_Control_Pins3.csv
+
+.. csv-table::
+ :file: specs/09_Control_Pins4.csv
+
+.. csv-table::
+ :file: specs/09_Control_Pins5.csv
+
diff --git a/docs/electrical.rst b/docs/electrical.rst
new file mode 100644
index 0000000..dc1c31e
--- /dev/null
+++ b/docs/electrical.rst
@@ -0,0 +1,6 @@
+Electrical Characteristics (DVDD = 4.50V to 5.50V, Temp = -40 degC to 125 degC)
+===============================================================================
+
+ .. csv-table::
+ :file: specs/18_Electrical_Characteristics.csv
+
diff --git a/docs/esd.rst b/docs/esd.rst
new file mode 100644
index 0000000..4fbf163
--- /dev/null
+++ b/docs/esd.rst
@@ -0,0 +1,8 @@
+==============
+ESD Protection
+==============
+
+ .. csv-table::
+ :file: specs/16_ESD_Protection.csv
+
+
diff --git a/docs/features.rst b/docs/features.rst
new file mode 100644
index 0000000..7c24f56
--- /dev/null
+++ b/docs/features.rst
@@ -0,0 +1,16 @@
+2.0 Library Features
+====================
+
+2.1 Technology Options
+----------------------
+
+The GlobalFoundries 0.18μm Green 5V I/O library is available in 3LM, 4LM, 5LM metal stack options. The bond pad is **non-CUP** due to design manual restriction on 3LM. The top metal thickness is available in 6kÅ and 9kA. The design grid used is 0.005μm.
+
+2.2 Cell Dimensions
+-------------------
+
+.. csv-table::
+ :file: specs/03_Cell_Dimensions.csv
+
+The I/O cell height of 350μm (est.) is inclusive of the bonding pad. The bond pad opening is 60μmx60μm.
+
diff --git a/docs/functional.rst b/docs/functional.rst
new file mode 100644
index 0000000..e89404f
--- /dev/null
+++ b/docs/functional.rst
@@ -0,0 +1,14 @@
+4.0 Functional Description
+==========================
+
+.. toctree::
+ :glob:
+
+ digital
+ tri_state_1
+ tri_state_2
+ input_only
+ analog
+ power
+
+
diff --git a/docs/index.rst b/docs/index.rst
new file mode 100644
index 0000000..02341eb
--- /dev/null
+++ b/docs/index.rst
@@ -0,0 +1,20 @@
+**************************************
+gf180mcu_fd_io 5V Inline non-CUP GPIO
+**************************************
+
+.. centered::
+ **GlobalFoundries 0.18µm Green Process**
+.. centered::
+ **5V Wide-Range Inline non-CUP GPIO Library**
+.. centered::
+ **Datasheet**
+
+.. toctree::
+ :glob:
+
+ datasheet
+ features
+ naming
+ functional
+ specs
+
diff --git a/docs/input_only.rst b/docs/input_only.rst
new file mode 100644
index 0000000..6639776
--- /dev/null
+++ b/docs/input_only.rst
@@ -0,0 +1,24 @@
+4.4 Input Only I/O Cell
+=======================
+
+.. image:: specs/Input_IO_Cell1.png
+ :width: 600
+ :align: center
+ :alt: Input Only I/O Cell
+
+.. centered::
+ Figure 4.3 Functional Schematic of CMOS Input Only Pad, gf180mcu_fd_io__in_c
+
+.. image:: specs/Input_IO_Cell2.png
+ :width: 600
+ :align: center
+ :alt: Input Only I/O Cell
+
+.. centered::
+ Figure 4.4 Functional Schematic of Schmitt Trigger Input Only Pad, gf180mcu_fd_io__in_s
+
+**gf180mcu_fd_io__in_c** and **gf180mcu_fd_io__in_s** are input only pads configured in CMOS and Schmitt trigger modes respectively. Both pads are equipped with pull-up/down programmability. The logical operation of the pad is as shown below.
+
+ .. csv-table::
+ :file: specs/14_Input_IO_Cell.csv
+
diff --git a/docs/latchup.rst b/docs/latchup.rst
new file mode 100644
index 0000000..08addde
--- /dev/null
+++ b/docs/latchup.rst
@@ -0,0 +1,7 @@
+Latchup Immunity
+================
+
+ .. csv-table::
+ :file: specs/17_Latchup_Immunity.csv
+
+
diff --git a/docs/naming.rst b/docs/naming.rst
new file mode 100644
index 0000000..4898cf1
--- /dev/null
+++ b/docs/naming.rst
@@ -0,0 +1,36 @@
+3.0 Naming Convention
+=====================
+
+3.1 Cell Naming Convention
+--------------------------
+
+**Digital I/O Cell**
+
+.. csv-table::
+ :file: specs/04_Digital_IO_Cell.csv
+
+**Analogue Signal Cell**
+
+.. csv-table::
+ :file: specs/05_Analogue_Signal_Cell.csv
+
+**Support Cell**
+
+.. csv-table::
+ :file: specs/06_Support_Cell.csv
+
+3.2 Pin Naming Convention
+-------------------------
+
+**Digital I/O Cell**
+
+.. csv-table::
+ :file: specs/07_Digital_IO_Cell.csv
+
+**Analogue Signal Cell**
+
+.. csv-table::
+ :file: specs/08_Analogue_Signal_Cell.csv
+
+
+
diff --git a/docs/power.rst b/docs/power.rst
new file mode 100644
index 0000000..8c8705f
--- /dev/null
+++ b/docs/power.rst
@@ -0,0 +1,7 @@
+4.6 Power supply pads and Corner pad
+====================================
+
+Each power supply pad, DVDD and DVSS has one ESD protection circuit inside. The leakage current of one ESD protection circuit is 648 nA maximum from simulation. Simulation conditions: FF corner, 5.5V at 125C.
+
+Each corner pad has 2 ESD protection circuit inside. So total leakage current for each corner pad is 1296 nA maximum from simulation.
+
diff --git a/docs/specs.rst b/docs/specs.rst
new file mode 100644
index 0000000..4aafb48
--- /dev/null
+++ b/docs/specs.rst
@@ -0,0 +1,13 @@
+5.0 Specifications
+==================
+
+.. toctree::
+ :glob:
+
+ conditions
+ esd
+ latchup
+ electrical
+ delay_input
+ delay_output
+ corners
diff --git a/docs/specs/01_release.csv b/docs/specs/01_release.csv
new file mode 100644
index 0000000..25d5897
--- /dev/null
+++ b/docs/specs/01_release.csv
@@ -0,0 +1,3 @@
+Rev.,Date,Description of Changes
+1.0,Apr 30 14,First release
+1.1,Jul 30 14,Updated the table of cell dimensions
diff --git a/docs/specs/02_Cell_List.csv b/docs/specs/02_Cell_List.csv
new file mode 100644
index 0000000..5f320e4
--- /dev/null
+++ b/docs/specs/02_Cell_List.csv
@@ -0,0 +1,30 @@
+Cell Type,Cell Name,Description
+Bidirectional,gf180mcu_fd_io__bi_t,"5V WR bidirectional pad with programmable drive
+
+strength of 4mA, 8mA, 12mA and 16mA tri-state
+
+output buffer, fast/slow slew rate control, pull-
+
+up/down and selectable CMOS/Schmitt input."
+,gf180mcu_fd_io__bi_24t,"5V WR bidirectional pad with 24mA drive strength tri-
+
+state output buffer, fast/slow slew rate control, pull-
+
+up/down and selectable CMOS/Schmitt input."
+Input,gf180mcu_fd_io__in_c,5V WR CMOS input only pad with pull-up/down
+,gf180mcu_fd_io__in_s,"5V WR Schmitt Trigger input only pad with pull-
+
+up/down"
+Analog,gf180mcu_fd_io__asig_5p0,"5V WR analogue signal pad with double diode
+
+protection (DC current carrying capability 10mA)"
+"Power
+Supply",gf180mcu_fd_io__dvdd,Power supply cell (DC current carrying capability 60mA)
+,gf180mcu_fd_io__dvss,Ground cell (DC current carrying capability 60mA)
+Corner,gf180mcu_fd_io__cor,Corner cell
+Filler,gf180mcu_fd_io__fillnc *,Filler for gap width less than 1μm
+,gf180mcu_fd_io__fill1,1μm filler
+,gf180mcu_fd_io__fill5,5μm filler
+,gf180mcu_fd_io__fill10,10μm filler
+Breaker,gf180mcu_fd_io__brk2,2μm Breaker with VSS
+,gf180mcu_fd_io__brk5,5μm Breaker with VSS
diff --git a/docs/specs/03_Cell_Dimensions.csv b/docs/specs/03_Cell_Dimensions.csv
new file mode 100644
index 0000000..01725f3
--- /dev/null
+++ b/docs/specs/03_Cell_Dimensions.csv
@@ -0,0 +1,15 @@
+Pad Cell Name,Height (est.),Width (est.),Unit
+gf180mcu_fd_io__bi_t,350,75,μm
+gf180mcu_fd_io__bi_24t,350,75,μm
+gf180mcu_fd_io__in_c,350,75,μm
+gf180mcu_fd_io__in_s,350,75,μm
+gf180mcu_fd_io__asig_5p0,350,75,μm
+gf180mcu_fd_io__dvdd,350,75,μm
+gf180mcu_fd_io__dvss,350,75,μm
+gf180mcu_fd_io__cor,355,355,μm
+gf180mcu_fd_io__fillnc,350,0.1,μm
+gf180mcu_fd_io__fill1,350,1,μm
+gf180mcu_fd_io__fill5,350,5,μm
+gf180mcu_fd_io__fill10,350,10,μm
+gf180mcu_fd_io__brk2,350,2,μm
+gf180mcu_fd_io__brk5,350,5,μm
diff --git a/docs/specs/04_Digital_IO_Cell.csv b/docs/specs/04_Digital_IO_Cell.csv
new file mode 100644
index 0000000..28ea5b4
--- /dev/null
+++ b/docs/specs/04_Digital_IO_Cell.csv
@@ -0,0 +1,5 @@
+,Symbol,Description
+Cell Type,GF,GF pad cell
+I/O Type,_in,Input
+I/O Type,_bi,Bidirectional
+Output Type,_xt,Tristate with drive strength of x mA
diff --git a/docs/specs/05_Analogue_Signal_Cell.csv b/docs/specs/05_Analogue_Signal_Cell.csv
new file mode 100644
index 0000000..8425c75
--- /dev/null
+++ b/docs/specs/05_Analogue_Signal_Cell.csv
@@ -0,0 +1,3 @@
+,,Symbol,Description
+Cell Type,,GF,GF pad cell
+Function,,_asig_5p0,Analogue I/O for 5.0V device
diff --git a/docs/specs/06_Support_Cell.csv b/docs/specs/06_Support_Cell.csv
new file mode 100644
index 0000000..4a487bb
--- /dev/null
+++ b/docs/specs/06_Support_Cell.csv
@@ -0,0 +1,8 @@
+,,Symbol,Description
+Cell Type,,GF,GF pad cell
+Power,,_dvdd,DVDD power cell
+,,_dvss,DVSS ground cell
+Corner,,_cor,Corner cell
+Filler,,_fillx,Filler cell with width = x μm
+Filler,,_fillnc,Filler cell for gap width less than 1μm
+Breaker,,_brkx,Breaker cell with width = x μm
diff --git a/docs/specs/07_Digital_IO_Cell.csv b/docs/specs/07_Digital_IO_Cell.csv
new file mode 100644
index 0000000..828df48
--- /dev/null
+++ b/docs/specs/07_Digital_IO_Cell.csv
@@ -0,0 +1,16 @@
+PIN,Function
+DVDD,5V supply for output drivers
+VDD,5V supply for pre-drive in I/O pads
+DVSS,Ground for output drivers
+VSS,Ground for pre-drive in I/O pads
+IE,Input enable
+PD,Pull-down enable
+PU,Pull-up enable
+Y,Data output to core
+PAD,Data input from/output to bond pad
+OE,Output enable
+A,Data input from core
+CS,CMOS/Schmitt trigger input select
+SL,Fast/Slow slew rate select
+PDRV0,Output drive strength selector
+PDRV1,Output drive strength selector
diff --git a/docs/specs/08_Analogue_Signal_Cell.csv b/docs/specs/08_Analogue_Signal_Cell.csv
new file mode 100644
index 0000000..17b2bf2
--- /dev/null
+++ b/docs/specs/08_Analogue_Signal_Cell.csv
@@ -0,0 +1,3 @@
+PIN,Function
+ASIG5V,5V analogue signal input from/output to core
+PAD,Data input from/output to bond pad
diff --git a/docs/specs/09_Control_Pins1.csv b/docs/specs/09_Control_Pins1.csv
new file mode 100644
index 0000000..eeb5e1a
--- /dev/null
+++ b/docs/specs/09_Control_Pins1.csv
@@ -0,0 +1,5 @@
+IE,OE,Input/Output Control
+0,0,Input & Output Disable
+0,1,Output Enabled
+1,0,Input Enabled
+1,1,Disallowed
diff --git a/docs/specs/09_Control_Pins2.csv b/docs/specs/09_Control_Pins2.csv
new file mode 100644
index 0000000..1240545
--- /dev/null
+++ b/docs/specs/09_Control_Pins2.csv
@@ -0,0 +1,3 @@
+CS,Input Type
+0,CMOS Buffer
+1,Schmitt Trigger
diff --git a/docs/specs/09_Control_Pins3.csv b/docs/specs/09_Control_Pins3.csv
new file mode 100644
index 0000000..d077b68
--- /dev/null
+++ b/docs/specs/09_Control_Pins3.csv
@@ -0,0 +1,5 @@
+PU,PD,Resistive Pulling
+0,0,Normal CMOS
+0,1,Pull Down
+1,0,Pull Up
+1,1,Normal CMOS
diff --git a/docs/specs/09_Control_Pins4.csv b/docs/specs/09_Control_Pins4.csv
new file mode 100644
index 0000000..d03d46d
--- /dev/null
+++ b/docs/specs/09_Control_Pins4.csv
@@ -0,0 +1,3 @@
+SL,Output Slew Rate
+0,Fast
+1,Slow
diff --git a/docs/specs/09_Control_Pins5.csv b/docs/specs/09_Control_Pins5.csv
new file mode 100644
index 0000000..45b570f
--- /dev/null
+++ b/docs/specs/09_Control_Pins5.csv
@@ -0,0 +1,5 @@
+PDRV1,PDRV0,Output drive strength
+0,0,4mA
+0,1,8mA
+1,0,12mA
+1,1,16mA
diff --git a/docs/specs/10_Driver_Function.csv b/docs/specs/10_Driver_Function.csv
new file mode 100644
index 0000000..cf06c8e
--- /dev/null
+++ b/docs/specs/10_Driver_Function.csv
@@ -0,0 +1,8 @@
+Input,,,,Output
+OE,PU ,PD,A,PAD
+0,0,0,X,Hi-Z
+0,0,1,X,weak 0
+0,1,0,X,weak 1
+0,1,1,X,Hi-Z
+1,X,X,0,0
+1,X,X,1,1
diff --git a/docs/specs/11_Receiver_Function.csv b/docs/specs/11_Receiver_Function.csv
new file mode 100644
index 0000000..f1347ed
--- /dev/null
+++ b/docs/specs/11_Receiver_Function.csv
@@ -0,0 +1,7 @@
+Input,,,,Output
+IE ,PU,PD,PAD,Y
+0,X,X,X,0
+1,X,X,0,0
+1,X,X,1,1
+1,0,1,weak 0,0
+1,1,0,weak 1,1
diff --git a/docs/specs/12_Driver_Function.csv b/docs/specs/12_Driver_Function.csv
new file mode 100644
index 0000000..6fd51f5
--- /dev/null
+++ b/docs/specs/12_Driver_Function.csv
@@ -0,0 +1,8 @@
+Input,,,,Output
+OE,PU, PD,A,PAD
+0,0,0,X,Hi-Z
+0,0,1,X,weak 0
+0,1,0,X,weak 1
+0,1,1,X,Hi-Z
+1,X, X,0,0
+1,X, X,1,1
diff --git a/docs/specs/13_Receiver_Function.csv b/docs/specs/13_Receiver_Function.csv
new file mode 100644
index 0000000..e1c063e
--- /dev/null
+++ b/docs/specs/13_Receiver_Function.csv
@@ -0,0 +1,7 @@
+Input,,,,Output
+IE ,PU,PD,PAD,Y
+0,X,X,X,0
+1,X,X,0,0
+1,X,X,1,1
+1,0,1,weak 0,0
+1,1,0, weak 1,1
diff --git a/docs/specs/14_Input_IO_Cell.csv b/docs/specs/14_Input_IO_Cell.csv
new file mode 100644
index 0000000..b105ad4
--- /dev/null
+++ b/docs/specs/14_Input_IO_Cell.csv
@@ -0,0 +1,6 @@
+,Input,,Output
+PU,PD ,PAD,Y
+X,X,0,0
+X,X,1,1
+0,1, weak 0,0
+1,0, weak 1,1
diff --git a/docs/specs/15_Operating_Conditions.csv b/docs/specs/15_Operating_Conditions.csv
new file mode 100644
index 0000000..6d40086
--- /dev/null
+++ b/docs/specs/15_Operating_Conditions.csv
@@ -0,0 +1,3 @@
+Parameter,Min,Typ,Max,Unit
+I/O DC Supply Voltage,4.5,5,5.5,V
+Junction Temperature,-40,25,125,°C
diff --git a/docs/specs/16_ESD_Protection.csv b/docs/specs/16_ESD_Protection.csv
new file mode 100644
index 0000000..a531811
--- /dev/null
+++ b/docs/specs/16_ESD_Protection.csv
@@ -0,0 +1,4 @@
+ESD Model,Target
+Human Body Model (HBM),2000V
+Machine Model (MM),200V
+Charged Device Model (CDM),500V
diff --git a/docs/specs/17_Latchup_Immunity.csv b/docs/specs/17_Latchup_Immunity.csv
new file mode 100644
index 0000000..81c267c
--- /dev/null
+++ b/docs/specs/17_Latchup_Immunity.csv
@@ -0,0 +1,2 @@
+Pads, Latch-up Testing Standard,Target
+Digital and Analog I/O, JESD78B,+/- 100mA @ 25~125 C
diff --git a/docs/specs/18_Electrical_Characteristics.csv b/docs/specs/18_Electrical_Characteristics.csv
new file mode 100644
index 0000000..b8e1f7c
--- /dev/null
+++ b/docs/specs/18_Electrical_Characteristics.csv
@@ -0,0 +1,70 @@
+Parameter,Condition,Symbol,Min,Max,Unit
+Input Low Voltage,,VIL,-0.3,0.8,V
+Input High Voltage,"Normal
+
+CMOS/TTL input",VIH,2,DVDD+0.3,V
+Input Low Voltage,Schmitt trigger Input,VIL,-0.3,0.8,V
+Input High Voltage,,V_IH,2,DVDD+0.3,V
+Hysteresis,,V_HYS,0.4,0.6,V
+Input High Leakage Current,Vin = DVDD,IIH,-5,5,μA
+Input Low Leakage Current,Vin = DVSS,IIL,-5,5,μA
+Input Resistance with Pull-Down,Vin = DVDD,RPD,80,210,kΩ
+Input Resistance with Pull-Up,Vin = DVSS,RPU,80,210,kΩ
+"Output Low Current
+
+( DC drive strength of 4,8,12,16 or
+
+24mA only @ DVDD 4.5-5.5V )",V_OL = 0.5V,IOL,"4
+
+8
+
+12
+
+16
+
+24","\-
+
+\-
+
+\-
+
+\-
+
+\-","mA
+
+mA
+
+mA
+
+mA
+
+mA"
+"Output High Current
+
+( DC drive strength of 4,8,12,16 or
+
+24mA only @ DVDD 4.5-5.5V)",V_OH = DVDD-0.8V,I_OH,"4
+
+8
+
+12
+
+16
+
+24","\-
+
+\-
+
+\-
+
+\-
+
+\-","mA
+
+mA
+
+mA
+
+mA
+
+mA"
diff --git a/docs/specs/19_Input_Propagation_Delay.csv b/docs/specs/19_Input_Propagation_Delay.csv
new file mode 100644
index 0000000..c64de74
--- /dev/null
+++ b/docs/specs/19_Input_Propagation_Delay.csv
@@ -0,0 +1,5 @@
+Configuration,Input, Output, Transition,Cload,Min,Typ,Max,Unit
+Input (CMOS),PAD,Y,L to H,0.5pF,\-,\-,3,ns
+,PAD,Y,H to L,0.5pF,\-,\-,3,ns
+Input (Schmitt),PAD,Y,L to H,0.5pF,\-,\-,3,ns
+,PAD,Y,H to L,0.5pF,\-,\-,3,ns
diff --git a/docs/specs/20_Output_Propagation_Delay.csv b/docs/specs/20_Output_Propagation_Delay.csv
new file mode 100644
index 0000000..78ea36e
--- /dev/null
+++ b/docs/specs/20_Output_Propagation_Delay.csv
@@ -0,0 +1,25 @@
+Configuration,Input ,Output ,Transition,Cload,Min,Typ,Max,Unit
+"4mA Drive Strength
+
+At Slow Slew",A ,PAD,L to H,30pF,\-,\-,12,ns
+,A ,PAD,H to L,30pF,\-,\-,12,ns
+"4mA Drive Strength
+
+At Fast Slew",A ,PAD,L to H,30pF,\-,\-,11,ns
+,A ,PAD,H to L,30pF,\-,\-,11,ns
+"16mA Drive Strength
+
+At Slow Slew",A ,PAD,L to H,30pF,\-,\-,10,ns
+,A ,PAD,H to L,30pF,\-,\-,10,ns
+"16mA Drive Strength
+
+At Fast Slew",A ,PAD,L to H,30pF,\-,\-,7,ns
+,A ,PAD,H to L,30pF,\-,\-,7,ns
+"24mA Drive Strength
+
+At Slow Slew",A ,PAD,L to H,50pF,\-,\-,10,ns
+,A ,PAD,H to L,50pF,\-,\-,10,ns
+"24mA Drive Strength
+
+At Fast Slew",A ,PAD,L to H,50pF,\-,\-,7,ns
+,A ,PAD,H to L,50pF,\-,\-,7,ns
diff --git a/docs/specs/21_Characterization_Corners.csv b/docs/specs/21_Characterization_Corners.csv
new file mode 100644
index 0000000..7558463
--- /dev/null
+++ b/docs/specs/21_Characterization_Corners.csv
@@ -0,0 +1,13 @@
+oProcess corner ,DVDD(V),Temperature( C)
+SS,4.5,125
+FF,5.5,-40
+TT,5,25
+FF*,5.5,125
+SS,2.97,125
+FF,3.63,-40
+TT,3.3,25
+FF*,3.63,125
+SS,2.25,125
+FF,2.75,-40
+TT,2.5,25
+FF*,2.75,125
diff --git a/docs/specs/Analogue_Signal_Cells1.png b/docs/specs/Analogue_Signal_Cells1.png
new file mode 100644
index 0000000..fd8deaf
--- /dev/null
+++ b/docs/specs/Analogue_Signal_Cells1.png
Binary files differ
diff --git a/docs/specs/Analogue_Signal_Cells2.png b/docs/specs/Analogue_Signal_Cells2.png
new file mode 100644
index 0000000..0ee0b6d
--- /dev/null
+++ b/docs/specs/Analogue_Signal_Cells2.png
Binary files differ
diff --git a/docs/specs/Input_IO_Cell1.png b/docs/specs/Input_IO_Cell1.png
new file mode 100644
index 0000000..08dc875
--- /dev/null
+++ b/docs/specs/Input_IO_Cell1.png
Binary files differ
diff --git a/docs/specs/Input_IO_Cell2.png b/docs/specs/Input_IO_Cell2.png
new file mode 100644
index 0000000..a9dde65
--- /dev/null
+++ b/docs/specs/Input_IO_Cell2.png
Binary files differ
diff --git a/docs/specs/tri_state1.png b/docs/specs/tri_state1.png
new file mode 100644
index 0000000..36d8f7a
--- /dev/null
+++ b/docs/specs/tri_state1.png
Binary files differ
diff --git a/docs/specs/tri_state2.png b/docs/specs/tri_state2.png
new file mode 100644
index 0000000..cfa9bf4
--- /dev/null
+++ b/docs/specs/tri_state2.png
Binary files differ
diff --git a/docs/tri_state_1.rst b/docs/tri_state_1.rst
new file mode 100644
index 0000000..62042e6
--- /dev/null
+++ b/docs/tri_state_1.rst
@@ -0,0 +1,24 @@
+4.2 Tri-state Programmable Digital I/O Cell
+===========================================
+
+.. image:: specs/tri_state1.png
+ :width: 600
+ :align: center
+ :alt: Tri-state Programmable Digital I/O Cell
+
+.. centered::
+ Figure 4.1 Functional Schematic of Tri-state Digital I/O Pad, gf180mcu_fd_io__bi_t
+
+The pad **gf180mcu_fd_io__bi_t** is a 5V tri-state bi-directional I/O pad with programmable output drive strengths of 4mA, 8mA, 12mA and 16mA. It can be programmed as CMOS input or CMOS Schmitt trigger input and with or without pull-up/down. In the fast slew 16mA drive strength mode, it can runs at a frequency of 100MHz with 30pF capacitive load. The use of the control pins PDRV0, PDRV1, SL, CS is as shown in section 4.1. The logical operation of the cell is as shown below.
+
+**Driver Function**
+
+ .. csv-table::
+ :file: specs/10_Driver_Function.csv
+
+**Receiver Function**
+
+ .. csv-table::
+ :file: specs/11_Receiver_Function.csv
+
+
diff --git a/docs/tri_state_2.rst b/docs/tri_state_2.rst
new file mode 100644
index 0000000..5aa3022
--- /dev/null
+++ b/docs/tri_state_2.rst
@@ -0,0 +1,24 @@
+4.3 Tri-state 24mA Programmable Digital I/O Cell
+================================================
+
+.. image:: specs/tri_state2.png
+ :width: 600
+ :align: center
+ :alt: Tri-state 24mA Programmable Digital I/O Cell
+
+.. centered::
+ Figure 4.2 Functional Schematic of Tri-state Digital I/O Pad, gf180mcu_fd_io__bi_24t
+
+The pad **gf180mcu_fd_io__bi_24t** is a 5V tri-state bi-directional I/O pad with output drive strength of 24mA. It can be programmed as CMOS input or CMOS Schmitt trigger input and with or without pull-up/down. In the fast slew mode, it can runs at a frequency of 100MHz with 50pF capacitive load. The use of the control pins PDRV0, PDRV1, SL, CS is as shown in section 4.1. The logical operation of the cell is as shown below.
+
+**Driver Function**
+
+ .. csv-table::
+ :file: specs/12_Driver_Function.csv
+
+**Receiver Function**
+
+ .. csv-table::
+ :file: specs/13_Receiver_Function.csv
+
+
