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# LVS Documentation
Explains how to use the runset.
## Folder Structure
```text
πŸ“ lvs
┣ πŸ“testing Testing environment directory for GF180IC LVS.
┣ πŸ“rule_decks All LVS rule decks used in GF180IC.
┣ πŸ“œgf_018IC.lvs Main LVS rule deck that call all runsets.
┣ πŸ“œREADME.md This file to document the LVS run for GF180IC.
β”— πŸ“œrun_lvs.py Main python script used for GF180IC LVS.
```
## **Prerequisites**
You need the following set of tools installed to be able to run GF180IC LVS:
- Python 3.6+
- KLayout 0.28.4+
## **Usage**
The `run_lvs.py` script takes your input gds and netlist files to run LVS rule deck of GF180IC technology on it with switches to select subsets of all checks.
```bash
run_lvs.py (--help| -h)
run_lvs.py (--layout=<layout_path>) (--netlist=<netlist_path>) (--variant=<combined_options>) [--thr=<thr>] [--run_dir=<run_dir_path>] [--topcell=<topcell_name>] [--run_mode=<run_mode>] [--verbose] [--lvs_sub=<sub_name>] [--no_net_names] [--spice_comments] [--scale] [--schematic_simplify] [--net_only] [--top_lvl_pins] [--combine] [--purge] [--purge_nets]
```
Example:
```bash
python3 run_lvs.py --layout=testing/testcases/extraction_checking/nfet_01v8.gds --netlist=testing/testcases/extraction_checking/nfet_01v8.cdl --variant=C --run_mode=deep --run_dir=lvs_switch_checking --lvs_sub=vdd!
```
### Options
- `--help -h` Print this help message.
- `--layout=<layout_path>` The input GDS file path.
- `--netlist=<netlist_path>` The input netlist file path.
- `--variant=<combined_options>` Select combined options of metal_top, mim_option, and metal_level. Allowed values (A, B, C).
- gf180IC=A: Select metal_top=30K mim_option=A metal_level=3LM poly_res=1K, and mim_cap=2
- gf180IC=B: Select metal_top=11K mim_option=B metal_level=4LM poly_res=1K, and mim_cap=2
- gf180IC=C: Select metal_top=9K mim_option=B metal_level=5LM poly_res=1K, and mim_cap=2
- `--thr=<thr>` The number of threads used in run.
- `--run_dir=<run_dir_path>` Run directory to save all the results [default: pwd]
- `--topcell=<topcell_name>` Topcell name to use.
- `--run_mode=<run_mode>` Select klayout mode Allowed modes (flat , deep, tiling). [default: deep]
- `--lvs_sub=<sub_name>` Substrate name used in your design.
- `--verbose` Detailed rule execution log for debugging.
- `--no_net_names` Discard net names in extracted netlist.
- `--spice_comments` Enable netlist comments in extracted netlist.
- `--scale` Enable scale of 1e6 in extracted netlist.
- `--schematic_simplify` Enable schematic simplification in input netlist.
- `--net_only` Enable netlist object creation only in extracted netlist.
- `--top_lvl_pins` Enable top level pins only in extracted netlist.
- `--combine` Enable netlist combine only in extracted netlist.
- `--purge` Enable netlist purge all only in extracted netlist.
- `--purge_nets` Enable netlist purge nets only in extracted netlist.
## **LVS Outputs**
You could find the run results at your run directory if you previously specified it through `--run_dir=<run_dir_path>`. Default path of run directory is `lvs_run_<date>_<time>` in current directory.
### Folder Structure of run results
```text
πŸ“ lvs_run_<date>_<time>
┣ πŸ“œ lvs_run_<date>_<time>.log
β”— πŸ“œ <your_design_name>.cir
β”— πŸ“œ <your_design_name>.lvsdb
```
The result is a database file (`<your_design_name>.lvsdb`) contains LVS extractions and comparison results.
You could view it on your file using: `klayout <input_gds_file> -m <resut_db_file> `, or you could view it on your gds file via netlist browser option in tools menu using klayout GUI.
You could also find the extracted netlist generated from your design at (`<your_design_name>.cir`) in your run directory.
## **Devices Status**
|Device Group|Device Name |Sim Models |Google Standard Name |Status |Standard Digital|Analog|Advanced Analog|RF |HV |ESD |
|------------|-----------------------|------------------|-----------------------------|------------------|----------------|------|---------------|-----|-----|-----|
|MOSFET |nmos_1p8 |:heavy_check_mark:|nfet_01v8 |:heavy_check_mark:|Yes |Yes |Yes |Maybe|No |No |
|MOSFET |nmos_1p8_nat |:heavy_check_mark:|nfet_01v8_nvt |:heavy_check_mark:|Yes |Yes |Maybe |Maybe|No |No |
|MOSFET |nmos_1p8_mvt |:heavy_check_mark:|nfet_01v8_mvt |:x: |No |Yes |Yes |Maybe|No |No |
|MOSFET |nmos_3p3 |:heavy_check_mark:|nfet_03v3 |:heavy_check_mark:|Yes |Yes |Yes |Maybe|No |No |
|MOSFET |nmos_3p3_mvt |:heavy_check_mark:|nfet_03v3_mvt |:x: |No |Yes |Yes |Maybe|No |No |
|MOSFET |nmos_3p3_nat |:heavy_check_mark:|nfet_03v3_nvt |:heavy_check_mark:|Yes |Yes |Maybe |Maybe|No |No |
|MOSFET |pmos_1p8 |:heavy_check_mark:|pfet_01v8 |:heavy_check_mark:|Yes |Yes |Yes |Maybe|No |No |
|MOSFET |pmos_1p8_mvt |:heavy_check_mark:|pfet_01v8_mvt |:x: |No |Yes |Yes |Maybe|No |No |
|MOSFET |pmos_3p3 |:heavy_check_mark:|pfet_03v3 |:heavy_check_mark:|Yes |Yes |Yes |Maybe|No |No |
| | | | | | | | | | | |
|BJT |vnpn_5x5 |:heavy_check_mark:|npn_05p00x05p00 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vnpn_2x2 |:heavy_check_mark:|npn_02p00x02p00 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vpnp_10x10 |:heavy_check_mark:|pnp_10p00x10p00 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vpnp_5x5 |:heavy_check_mark:|pnp_05p00x05p00 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vpnp_0p46x0p46 |:heavy_check_mark:|pnp_00p46x00p46 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vpnp_0p46x1p2 |:heavy_check_mark:|pnp_00p46x01p20 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |vpnp_1p2x2p5 |:heavy_check_mark:|pnp_01p20x02p50 |:heavy_check_mark:|No |Yes |Yes |Yes |Maybe|No |
|BJT |lpnp_1p8_0p54x0p54 |:heavy_check_mark:|pnp_00p54x00p54_01v8 |:x: |No |Yes |Yes |Yes |Maybe|No |
|BJT |lpnp_1p8_0p54x1p2 |:heavy_check_mark:|pnp_00p54x01p20_01v8 |:x: |No |Yes |Yes |Yes |Maybe|No |
|BJT |lpnp_1p8_1p2x2p5 |:heavy_check_mark:|pnp_01p20x02p50_01v8 |:x: |No |Yes |Yes |Yes |Maybe|No |
|BJT |lpnp_1p8_5x5 |:heavy_check_mark:|pnp_05p00x05p00_01v8 |:x: |No |Yes |Yes |Yes |Maybe|No |
| | | | | | | | | | | |
|DIODE |np_1p8 |:heavy_check_mark:|diode_nd2ps_01v8 |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |np_1p8_nat |:heavy_check_mark:|diode_nd2ps_01v8_nvt |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |np_3p3 |:heavy_check_mark:|diode_nd2ps_03v3 |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |np_3p3_nat |:heavy_check_mark:|diode_nd2ps_03v3_nvt |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |pn_1p8 |:heavy_check_mark:|diode_pd2nw_01v8 |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |pn_3p3 |:heavy_check_mark:|diode_pd2nw_03v3 |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |nwp |:heavy_check_mark:|diode_nw2ps |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |dnwpw |:heavy_check_mark:|diode_pw2dw |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
|DIODE |dnwps |:heavy_check_mark:|diode_dw2ps |:heavy_check_mark:|Maybe |Yes |Yes |Maybe|No |Maybe|
| | | | | | | | | | | |
|RES |nplus_u |:heavy_check_mark:|res_nd_3t_uns |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |nplus_s |:heavy_check_mark:|res_nd_3t_sal |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |nwell |:heavy_check_mark:|res_nw_3t |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |npolyf_u |:heavy_check_mark:|res_npo_3t_uns |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |npolyf_s |:heavy_check_mark:|res_npo_3t_sal |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |npolyf_u_1k |:heavy_check_mark:|res_npo_3t_uns_1k |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |pplus_u |:heavy_check_mark:|res_pd_3t_uns |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |pplus_s |:heavy_check_mark:|res_pd_3t_sal |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |ppolyf_u |:heavy_check_mark:|res_ppo_3t_uns |:heavy_check_mark:|No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |ppolyf_s |:heavy_check_mark:|res_ppo_3t_sal |:heavy_check_mark:|No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |ppolyf_u_1k |:heavy_check_mark:|res_ppo_3t_uns_1k |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |ppolyf_u_2k |:heavy_check_mark:|res_ppo_3t_uns_2k |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
| | | | | | | | | | | |
|RES |rm1 |:heavy_check_mark:|res_m1 |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |rm2 |:heavy_check_mark:|res_m2 |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |rm3 |:heavy_check_mark:|res_m3 |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |rm4 |:heavy_check_mark:|res_m4 |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |rm5 |:heavy_check_mark:|res_m5 |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |tm9k |:heavy_check_mark:|res_tm_9k |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
|RES |tm25k |:heavy_check_mark:|res_tm_25k |:x: |No |Yes |Yes |Maybe|Maybe|Maybe|
| | | | | | | | | | | |
|MIMCAP |mim_1p0fF |:heavy_check_mark:|cap_mim_1f0_m2m3_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p5fF |:heavy_check_mark:|cap_mim_1f5_m2m3_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_single_2p0fF |:heavy_check_mark:|cap_mim_2f0_m2m3_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p0fF |:heavy_check_mark:|cap_mim_1f0_m3m4_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p5fF |:heavy_check_mark:|cap_mim_1f5_m3m4_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_single_2p0fF |:heavy_check_mark:|cap_mim_2f0_m3m4_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p0fF |:heavy_check_mark:|cap_mim_1f0_m4m5_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p5fF |:heavy_check_mark:|cap_mim_1f5_m4m5_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_single_2p0fF |:heavy_check_mark:|cap_mim_2f0_m4m5_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p0fF |:heavy_check_mark:|cap_mim_1f0_m5m6_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_1p5fF |:heavy_check_mark:|cap_mim_1f5_m5m6_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_single_2p0fF |:heavy_check_mark:|cap_mim_2f0_m5m6_noshield |:heavy_check_mark:|No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_2p0fF |:heavy_check_mark:|cap_mim_2f0 |:x: |No |Yes |Yes |Yes |No |No |
|MIMCAP |mim_3p0fF |:heavy_check_mark:|cap_mim_3f0 |:x: |No |Yes |Yes |Yes |No |No |
| | | | | | | | | | | |
|VARACTOR |pnvar_1p8 |:heavy_check_mark:|cap_var_pd2nw_01v8 |:x: |No |Yes |Yes |Yes |No |No |
|VARACTOR |nmosvar_1p8 |:heavy_check_mark:|cap_var_01v8 |:x: |No |Yes |Yes |Yes |No |No |
|VARACTOR |nmosvar_3p3 |:heavy_check_mark:|cap_var_03v3 |:x: |No |Yes |Yes |Yes |No |No |